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| author | Thiemo Seufer <ths@networkno.de> | 2002-09-26 09:56:35 +0000 |
|---|---|---|
| committer | Thiemo Seufer <ths@networkno.de> | 2002-09-26 09:56:35 +0000 |
| commit | 3396de367a522c2e10a68389b48fc9e944d7cc04 (patch) | |
| tree | c243e888474312638918daa6bfb9b6c1ceb6faec /gas/config/tc-mips.c | |
| parent | 14366460653878e157fab7d8950946515889ccc6 (diff) | |
| download | gdb-3396de367a522c2e10a68389b48fc9e944d7cc04.zip gdb-3396de367a522c2e10a68389b48fc9e944d7cc04.tar.gz gdb-3396de367a522c2e10a68389b48fc9e944d7cc04.tar.bz2 | |
/gas/ChangeLog
* config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16
capable configuration.
(macro_build): Check for MIPS16 capability, not for actual MIPS16 code
generation.
(mips_ip): Likewise.
/gas/testsuite/ChangeLog
* gas/mips/mips-jalx.d: New file, check jalx assembly.
* gas/mips/mips-jalx.s: Likewise.
* gas/mips/mips-no-jalx.l: Likewise.
* gas/mips/mips-no-jalx.s: Likewise.
* gas/mips/mips16-jalx.d: Likewise.
* gas/mips/mips16-jalx.s: Likewise.
* gas/mips/mips.exp: Add new tests.
/opcodes/ChangeLog:
* mips-dis.c (print_insn_mips): Always allow disassembly of
32-bit jalx opcode.
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index bd797c4..6d0c13f 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -284,8 +284,9 @@ static int mips_32bitmode = 0; #define HAVE_64BIT_ADDRESSES (! HAVE_32BIT_ADDRESSES) /* Return true if the given CPU supports the MIPS16 ASE. */ -#define CPU_HAS_MIPS16(cpu) \ - (strncmp (TARGET_CPU, "mips16", sizeof ("mips16") - 1) == 0) +#define CPU_HAS_MIPS16(cpu) \ + (strncmp (TARGET_CPU, "mips16", sizeof ("mips16") - 1) == 0 \ + || strncmp (TARGET_CANONICAL, "mips-lsi-elf", sizeof ("mips-lsi-elf") - 1) == 0) /* Return true if the given CPU supports the MIPS3D ASE. */ #define CPU_HAS_MIPS3D(cpu) ((cpu) == CPU_SB1 \ @@ -2713,7 +2714,7 @@ macro_build (place, counter, ep, name, fmt, va_alist) && insn.insn_mo->pinfo != INSN_MACRO && OPCODE_IS_MEMBER (insn.insn_mo, (mips_opts.isa - | (mips_opts.mips16 ? INSN_MIPS16 : 0)), + | (file_ase_mips16 ? INSN_MIPS16 : 0)), mips_arch) && (mips_arch != CPU_R4650 || (insn.insn_mo->pinfo & FP_D) == 0)) break; @@ -7809,7 +7810,7 @@ mips_ip (str, ip) if (OPCODE_IS_MEMBER (insn, (mips_opts.isa - | (mips_opts.mips16 ? INSN_MIPS16 : 0) + | (file_ase_mips16 ? INSN_MIPS16 : 0) | (mips_opts.ase_mdmx ? INSN_MDMX : 0) | (mips_opts.ase_mips3d ? INSN_MIPS3D : 0)), mips_arch)) |