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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 09:32:55 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 09:32:55 +0000 |
| commit | fa7616a4c7661cf786f3eaa9282072ca5dd8099c (patch) | |
| tree | 11ef2eb4ec10903834cb68365334d7a26b77c1b0 /gas/config/tc-mips.c | |
| parent | 7c0de7419bd4f1b4aa0bdb3c15b03615dbe3959a (diff) | |
| download | gdb-fa7616a4c7661cf786f3eaa9282072ca5dd8099c.zip gdb-fa7616a4c7661cf786f3eaa9282072ca5dd8099c.tar.gz gdb-fa7616a4c7661cf786f3eaa9282072ca5dd8099c.tar.bz2 | |
include/opcode/
* mips.h: Remove documentation of "+D" and "+T".
opcodes/
* mips-opc.c (mips_builtin_opcodes): Remove "+D" and "+T" entries.
* micromips-opc.c (micromips_opcodes): Likewise.
* mips-dis.c (print_insn_args, print_insn_micromips): Remove "+D"
and "+T" handling. Check for a "0" suffix when deciding whether to
use coprocessor 0 names. In that case, also check for ",H" selectors.
gas/
* config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
(mips_ip): Remove "+D" and "+T" handling.
gas/testsuite/
* gas/mips/lb.d, gas/mips/sb.d: Use coprocessor register names
for LWC0 and SWC0.
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index d2b1f63..395230d 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -10889,8 +10889,6 @@ validate_mips_insn (const struct mips_opcode *opc) case 'A': USE_BITS (OP_MASK_SHAMT, OP_SH_SHAMT); break; case 'B': USE_BITS (OP_MASK_INSMSB, OP_SH_INSMSB); break; case 'C': USE_BITS (OP_MASK_EXTMSBD, OP_SH_EXTMSBD); break; - case 'D': USE_BITS (OP_MASK_RD, OP_SH_RD); - USE_BITS (OP_MASK_SEL, OP_SH_SEL); break; case 'E': USE_BITS (OP_MASK_SHAMT, OP_SH_SHAMT); break; case 'F': USE_BITS (OP_MASK_INSMSB, OP_SH_INSMSB); break; case 'G': USE_BITS (OP_MASK_EXTMSBD, OP_SH_EXTMSBD); break; @@ -10898,8 +10896,6 @@ validate_mips_insn (const struct mips_opcode *opc) case 'I': break; case 'J': USE_BITS (OP_MASK_CODE10, OP_SH_CODE10); break; case 't': USE_BITS (OP_MASK_RT, OP_SH_RT); break; - case 'T': USE_BITS (OP_MASK_RT, OP_SH_RT); - USE_BITS (OP_MASK_SEL, OP_SH_SEL); break; case 'x': USE_BITS (OP_MASK_BBITIND, OP_SH_BBITIND); break; case 'X': USE_BITS (OP_MASK_BBITIND, OP_SH_BBITIND); break; case 'p': USE_BITS (OP_MASK_CINSPOS, OP_SH_CINSPOS); break; @@ -11069,7 +11065,6 @@ validate_micromips_insn (const struct mips_opcode *opc) case 'A': USE_BITS (EXTLSB); break; case 'B': USE_BITS (INSMSB); break; case 'C': USE_BITS (EXTMSBD); break; - case 'D': USE_BITS (RS); USE_BITS (SEL); break; case 'E': USE_BITS (EXTLSB); break; case 'F': USE_BITS (INSMSB); break; case 'G': USE_BITS (EXTMSBD); break; @@ -11938,10 +11933,6 @@ mips_ip (char *str, struct mips_cl_insn *ip) s = expr_end; continue; - case 'D': - /* +D is for disassembly only; never match. */ - break; - case 'I': /* "+I" is like "I", except that imm2_expr is used. */ my_getExpression (&imm2_expr, s); @@ -11953,11 +11944,6 @@ mips_ip (char *str, struct mips_cl_insn *ip) s = expr_end; continue; - case 'T': /* Coprocessor register. */ - gas_assert (!mips_opts.micromips); - /* +T is for disassembly only; never match. */ - break; - case 't': /* Coprocessor register number. */ gas_assert (!mips_opts.micromips); if (s[0] == '$' && ISDIGIT (s[1])) |