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authorRichard Sandiford <rdsandiford@googlemail.com>2013-06-23 20:12:53 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2013-06-23 20:12:53 +0000
commitc3678916c694b6af469a882ae1df0dc15b89f44a (patch)
tree961262a8c453d7901b4cf62dfeee6c45a276872c /gas/config/tc-mips.c
parent42429eacb42f0cc6dfe7fbd6d74a59e652945794 (diff)
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include/opcode/
* mips.h: Fix comment typo: "G" is _RS rather than _RD for microMIPS. gas/ * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
Diffstat (limited to 'gas/config/tc-mips.c')
-rw-r--r--gas/config/tc-mips.c24
1 files changed, 13 insertions, 11 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index e259071..dba8b21 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -11386,8 +11386,8 @@ mips_ip (char *str, struct mips_cl_insn *ip)
continue;
case '3':
- /* DSP 3-bit unsigned immediate in bit 13 (for standard MIPS
- code) or 21 (for microMIPS code). */
+ /* DSP 3-bit unsigned immediate in bit 21 (for standard MIPS
+ code) or 13 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_SA3 : OP_MASK_SA3);
@@ -11405,8 +11405,8 @@ mips_ip (char *str, struct mips_cl_insn *ip)
continue;
case '4':
- /* DSP 4-bit unsigned immediate in bit 12 (for standard MIPS
- code) or 21 (for microMIPS code). */
+ /* DSP 4-bit unsigned immediate in bit 21 (for standard MIPS
+ code) or 12 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_SA4 : OP_MASK_SA4);
@@ -11424,8 +11424,8 @@ mips_ip (char *str, struct mips_cl_insn *ip)
continue;
case '5':
- /* DSP 8-bit unsigned immediate in bit 13 (for standard MIPS
- code) or 16 (for microMIPS code). */
+ /* DSP 8-bit unsigned immediate in bit 16 (for standard MIPS
+ code) or 13 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_IMM8 : OP_MASK_IMM8);
@@ -11443,8 +11443,8 @@ mips_ip (char *str, struct mips_cl_insn *ip)
continue;
case '6':
- /* DSP 5-bit unsigned immediate in bit 16 (for standard MIPS
- code) or 21 (for microMIPS code). */
+ /* DSP 5-bit unsigned immediate in bit 21 (for standard MIPS
+ code) or 16 (for microMIPS code). */
{
unsigned long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_RS : OP_MASK_RS);
@@ -11461,7 +11461,9 @@ mips_ip (char *str, struct mips_cl_insn *ip)
}
continue;
- case '7': /* Four DSP accumulators in bits 11,12. */
+ case '7':
+ /* Four DSP accumulators in bit 11 (for standard MIPS code)
+ or 14 (for microMIPS code). */
if (s[0] == '$' && s[1] == 'a' && s[2] == 'c'
&& s[3] >= '0' && s[3] <= '3')
{
@@ -11509,8 +11511,8 @@ mips_ip (char *str, struct mips_cl_insn *ip)
break;
case '0':
- /* DSP 6-bit signed immediate in bit 16 (for standard MIPS
- code) or 20 (for microMIPS code). */
+ /* DSP 6-bit signed immediate in bit 20 (for standard MIPS
+ code) or 16 (for microMIPS code). */
{
long mask = (mips_opts.micromips
? MICROMIPSOP_MASK_DSPSFT : OP_MASK_DSPSFT);