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| author | Thiemo Seufer <ths@networkno.de> | 2004-04-22 17:58:57 +0000 |
|---|---|---|
| committer | Thiemo Seufer <ths@networkno.de> | 2004-04-22 17:58:57 +0000 |
| commit | 24772049ed946f99d2ae9cf157129c63ecadb322 (patch) | |
| tree | 123206a837d1ca2ba92cffabd471faa758ea4760 /gas/config/tc-mips.c | |
| parent | 3b611f1a397d018e3fbbd339f1c973575adb998f (diff) | |
| download | gdb-24772049ed946f99d2ae9cf157129c63ecadb322.zip gdb-24772049ed946f99d2ae9cf157129c63ecadb322.tar.gz gdb-24772049ed946f99d2ae9cf157129c63ecadb322.tar.bz2 | |
* config/tc-mips.c (hilo_interlocks, gpr_interlocks,
cop_interlocks): Remove superfluous CPU entries.
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 7b6cee8..80fb607 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -346,7 +346,6 @@ static int mips_32bitmode = 0; || mips_opts.arch == CPU_R10000 \ || mips_opts.arch == CPU_R12000 \ || mips_opts.arch == CPU_RM7000 \ - || mips_opts.arch == CPU_SB1 \ || mips_opts.arch == CPU_VR5500 \ ) @@ -357,8 +356,6 @@ static int mips_32bitmode = 0; level I. */ #define gpr_interlocks \ (mips_opts.isa != ISA_MIPS1 \ - || mips_opts.arch == CPU_VR5400 \ - || mips_opts.arch == CPU_VR5500 \ || mips_opts.arch == CPU_R3900) /* Whether the processor uses hardware interlocks to avoid delays @@ -374,9 +371,6 @@ static int mips_32bitmode = 0; && mips_opts.isa != ISA_MIPS2 \ && mips_opts.isa != ISA_MIPS3) \ || mips_opts.arch == CPU_R4300 \ - || mips_opts.arch == CPU_VR5400 \ - || mips_opts.arch == CPU_VR5500 \ - || mips_opts.arch == CPU_SB1 \ ) /* Whether the processor uses hardware interlocks to protect reads |