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authorNick Clifton <nickc@redhat.com>2017-01-23 15:23:07 +0000
committerNick Clifton <nickc@redhat.com>2017-01-23 15:23:07 +0000
commit33eaf5de31b248f84ae108cf0cf4e1664db9ee51 (patch)
treef3634c9429c1b925928ca168737186c1c31f3a4a /gas/config/tc-mep.c
parent715e99a4980aeeb6511eded2e9d5ffe1b063f21e (diff)
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Fix spelling mistakes and typos in the GAS sources.
PR gas/21072 * asintl.h: Fix spelling mistakes and typos. * atof-generic.c: Likewise. * bit_fix.h: Likewise. * config/atof-ieee.c: Likewise. * config/bfin-defs.h: Likewise. * config/bfin-parse.y: Likewise. * config/obj-coff-seh.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-evax.c: Likewise. * config/obj-macho.c: Likewise. * config/rx-parse.y: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-avr.c: Likewise. * config/tc-bfin.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-cris.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-d10v.c: Likewise. * config/tc-d30v.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-epiphany.c: Likewise. * config/tc-frv.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386-intel.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68hc11.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-mep.h: Likewise. * config/tc-metag.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-nds32.c: Likewise. * config/tc-nds32.h: Likewise. * config/tc-nios2.c: Likewise. * config/tc-nios2.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-pdp11.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-pru.c: Likewise. * config/tc-rx.c: Likewise. * config/tc-s390.c: Likewise. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh64.c: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-v850.c: Likewise. * config/tc-vax.c: Likewise. * config/tc-visium.c: Likewise. * config/tc-xgate.c: Likewise. * config/tc-xtensa.c: Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * config/te-vms.c: Likewise. * config/xtensa-relax.c: Likewise. * doc/as.texinfo: Likewise. * doc/c-arm.texi: Likewise. * doc/c-hppa.texi: Likewise. * doc/c-i370.texi: Likewise. * doc/c-i386.texi: Likewise. * doc/c-m32r.texi: Likewise. * doc/c-m68k.texi: Likewise. * doc/c-mmix.texi: Likewise. * doc/c-msp430.texi: Likewise. * doc/c-nds32.texi: Likewise. * doc/c-ns32k.texi: Likewise. * doc/c-riscv.texi: Likewise. * doc/c-rx.texi: Likewise. * doc/c-s390.texi: Likewise. * doc/c-tic6x.texi: Likewise. * doc/c-tilegx.texi: Likewise. * doc/c-tilepro.texi: Likewise. * doc/c-v850.texi: Likewise. * doc/c-xgate.texi: Likewise. * doc/c-xtensa.texi: Likewise. * dwarf2dbg.c: Likewise. * ecoff.c: Likewise. * itbl-ops.c: Likewise. * listing.c: Likewise. * macro.c: Likewise. * po/gas.pot: Likewise. * read.c: Likewise. * struc-symbol.h: Likewise. * symbols.h: Likewise. * testsuite/gas/arc/relocs-errors.err: Likewise. * write.c: Likewise.
Diffstat (limited to 'gas/config/tc-mep.c')
-rw-r--r--gas/config/tc-mep.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c
index 6a53013..4a03c5b 100644
--- a/gas/config/tc-mep.c
+++ b/gas/config/tc-mep.c
@@ -442,7 +442,7 @@ mep_machine (void)
/* The MeP version of the cgen parse_operand function. The only difference
from the standard version is that we want to avoid treating '$foo' and
'($foo...)' as references to a symbol called '$foo'. The chances are
- that '$foo' is really a misspelt register. */
+ that '$foo' is really a misspelled register. */
static const char *
mep_parse_operand (CGEN_CPU_DESC cd, enum cgen_parse_operand_type want,
@@ -582,7 +582,7 @@ mep_check_parallel32_scheduling (void)
an internally parallel core or an internally parallel coprocessor,
neither of which are supported at this time. */
if ( num_insns_saved > 2 )
- as_fatal("Internally paralled cores and coprocessors not supported.");
+ as_fatal("Internally paralleled cores and coprocessors not supported.");
/* If there are no insns saved, that's ok. Just return. This will
happen when mep_process_saved_insns is called when the end of the
@@ -621,7 +621,7 @@ mep_check_parallel32_scheduling (void)
1. The instruction is a 32 bit core or coprocessor insn and
can be executed by itself. Valid.
- 2. The instrucion is a core instruction for which a cop nop
+ 2. The instruction is a core instruction for which a cop nop
exists. In this case, insert the cop nop into the saved
insn array after the core insn and return. Valid.
@@ -657,7 +657,7 @@ mep_check_parallel32_scheduling (void)
mep_insn insn;
/* Move the insn and it's fixups to the second element of the
- saved insns arrary and insert a 16 bit core nope into the
+ saved insns array and insert a 16 bit core nope into the
first element. */
insn.insn = mep_cgen_assemble_insn (gas_cgen_cpu_desc, "nop",
&insn.fields, insn.buffer,
@@ -758,7 +758,7 @@ mep_check_parallel64_scheduling (void)
1. The instruction is a 64 bit coprocessor insn and can be
executed by itself. Valid.
- 2. The instrucion is a core instruction for which a cop nop
+ 2. The instruction is a core instruction for which a cop nop
exists. In this case, insert the cop nop into the saved
insn array after the core insn and return. Valid.
@@ -773,7 +773,7 @@ mep_check_parallel64_scheduling (void)
we have to abort. */
/* If the insn is 64 bits long, it can run alone. The size check
- is done indepependantly of whether the insn is core or copro
+ is done independently of whether the insn is core or copro
in case 64 bit coprocessor insns are added later. */
if (insn0length == 64)
return;
@@ -1145,7 +1145,7 @@ mep_check_ivc2_scheduling (void)
#endif /* MEP_IVC2_SUPPORTED */
/* The scheduling functions are just filters for invalid combinations.
- If there is a violation, they terminate assembly. Otherise they
+ If there is a violation, they terminate assembly. Otherwise they
just fall through. Successful combinations cause no side effects
other than valid nop insertion. */
@@ -1800,7 +1800,7 @@ mep_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
break;
}
- /* Now call cgen's md_aply_fix. */
+ /* Now call cgen's md_apply_fix. */
gas_cgen_md_apply_fix (fixP, valP, seg);
}