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| author | Ian Lance Taylor <ian@airs.com> | 1992-08-19 18:27:48 +0000 |
|---|---|---|
| committer | Ian Lance Taylor <ian@airs.com> | 1992-08-19 18:27:48 +0000 |
| commit | c50140c86b1eff40d7ca75bf18df7e5d8e36f3ea (patch) | |
| tree | e3b629a55f64b3838ae201707438b62d7a2b73d8 /gas/config/tc-m68k.c | |
| parent | 1090c41efcfb57602db4549d38cc0003bcdb6d22 (diff) | |
| download | gdb-c50140c86b1eff40d7ca75bf18df7e5d8e36f3ea.zip gdb-c50140c86b1eff40d7ca75bf18df7e5d8e36f3ea.tar.gz gdb-c50140c86b1eff40d7ca75bf18df7e5d8e36f3ea.tar.bz2 | |
This is for PR 628.
Wed Aug 19 11:20:59 1992 Ian Lance Taylor (ian@cygnus.com)
* tc-m68k.c, tc-m68kmote.c: the cas2 instruction is supposed to be
written with indirection on the last two operands, which can be
either data or address registers. Added a new operand type 'r'
which accepts either register type. Added '(' to notend stuff in
tc-m68kmote.c to accept (a0):(a2) in cas2 instruction.
Diffstat (limited to 'gas/config/tc-m68k.c')
| -rw-r--r-- | gas/config/tc-m68k.c | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c index 0c60c77..c3d1b19 100644 --- a/gas/config/tc-m68k.c +++ b/gas/config/tc-m68k.c @@ -117,6 +117,7 @@ static struct obstack robyn; *** MSCR otherreg --> Magic With -l option 5.? AOFF apc@(num) --> *(apc+num) -- empty string and ZPC not allowed here still + ?.? DINDR dreg@ --> (dreg) -- cas2 only examples: #foo #0x35 #12 @@ -151,6 +152,7 @@ enum operand_type { ABSL, MSCR, REGLST, + DINDR }; @@ -665,7 +667,9 @@ register struct m68k_op *opP; return OK; } - if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL) { /* Can't indirect off non address regs */ + /* Can't indirect off non address regs, but Dx@ is OK for cas2 */ + if((i<ADDR+0 || i>ADDR+7) && i!=PC && i!=ZPC && i!=FAIL + && (str[1] != '\0' || i<DATA+0 || i>DATA+7)) { opP->error="Invalid indirect register"; return FAIL; } @@ -674,7 +678,10 @@ register struct m68k_op *opP; str++; switch(*str) { case '\0': - opP->mode=AINDR; + if (i < DATA + 0 || i > DATA + 7) + opP->mode=AINDR; + else + opP->mode=DINDR; return OK; case '-': opP->mode=ADEC; @@ -1294,6 +1301,11 @@ void m68k_ip (instring) losing++; break; + case 'r': + if (opP->mode!=AINDR && opP->mode!=DINDR) + losing++; + break; + case 's': if(opP->mode!=MSCR || !(opP->reg==FPI || opP->reg==FPS || opP->reg==FPC)) losing++; @@ -1809,6 +1821,9 @@ void m68k_ip (instring) break; } break; + case DINDR: + as_bad("invalid indirect register"); + break; case MSCR: default: as_bad("unknown/incorrect operand"); @@ -2090,6 +2105,7 @@ void m68k_ip (instring) break; case 'R': + case 'r': /* This depends on the fact that ADDR registers are eight more than their corresponding DATA regs, so the result will have the ADDR_REG bit set */ |