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author | Michael Meissner <gnu@the-meissners.org> | 2006-07-13 22:25:48 +0000 |
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committer | Michael Meissner <gnu@the-meissners.org> | 2006-07-13 22:25:48 +0000 |
commit | 050dfa73dea44eff603e96bcb195113a5e1b2219 (patch) | |
tree | 6b5ed323dac23229e91b11622beb8d232e2f8639 /gas/config/tc-i386.h | |
parent | 06d65a1d1e5bdb9f4ac98ea5ec0c156843a71640 (diff) | |
download | gdb-050dfa73dea44eff603e96bcb195113a5e1b2219.zip gdb-050dfa73dea44eff603e96bcb195113a5e1b2219.tar.gz gdb-050dfa73dea44eff603e96bcb195113a5e1b2219.tar.bz2 |
Add amdfam10 instructions
Diffstat (limited to 'gas/config/tc-i386.h')
-rw-r--r-- | gas/config/tc-i386.h | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index c51563a..4dc1756 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -91,8 +91,8 @@ extern const char extra_symbol_chars[]; extern const char *i386_comment_chars; #define tc_comment_chars i386_comment_chars -#define MAX_OPERANDS 3 /* max operands per insn */ -#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp) */ +#define MAX_OPERANDS 4 /* max operands per insn */ +#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp, insertq, extrq) */ #define MAX_MEMORY_OPERANDS 2 /* max memory refs per insn (string ops) */ /* Prefixes will be emitted in the order defined below. @@ -185,6 +185,9 @@ typedef struct #define CpuSVME 0x80000 /* AMD Secure Virtual Machine Ext-s required */ #define CpuVMX 0x100000 /* VMX Instructions required */ #define CpuMNI 0x200000 /* Merom New Instructions required */ +#define CpuSSE4a 0x400000 /* SSE4a New Instuctions required */ +#define CpuABM 0x800000 /* ABM New Instructions required */ +#define CpuAmdFam10 0x1000000 /* AmdFam10 New instructions required */ /* These flags are set by gas depending on the flag_code. */ #define Cpu64 0x4000000 /* 64bit support required */ @@ -192,8 +195,8 @@ typedef struct /* The default value for unknown CPUs - enable all features to avoid problems. */ #define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \ - |CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuPNI|CpuVMX \ - |Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock|CpuSVME|CpuMNI) + |CpuP4|CpuSledgehammer|CpuAmdFam10|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuPNI|CpuVMX \ + |Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock|CpuSVME|CpuMNI|CpuABM|CpuSSE4a) /* the bits in opcode_modifier are used to generate the final opcode from the base_opcode. These bits also are used to detect alternate forms of @@ -240,7 +243,7 @@ typedef struct by OR'ing together all of the possible type masks. (e.g. 'operand_types[i] = Reg|Imm' specifies that operand i can be either a register or an immediate operand. */ - unsigned int operand_types[3]; + unsigned int operand_types[4]; /* operand_types[i] bits */ /* register */ @@ -391,7 +394,8 @@ enum processor_type PROCESSOR_ATHLON, PROCESSOR_K8, PROCESSOR_GENERIC32, - PROCESSOR_GENERIC64 + PROCESSOR_GENERIC64, + PROCESSOR_AMDFAM10 }; /* x86 arch names, types and features */ |