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| author | H.J. Lu <hjl.tools@gmail.com> | 2006-02-27 15:35:37 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2006-02-27 15:35:37 +0000 |
| commit | 331d2d0d9ce1220133395ba0172b371aec077c16 (patch) | |
| tree | 7d035e233d226ebf0859ade38eee0da347c430eb /gas/config/tc-i386.h | |
| parent | 22edb2f16480aef5e060ad021199c3086300a4f5 (diff) | |
| download | gdb-331d2d0d9ce1220133395ba0172b371aec077c16.zip gdb-331d2d0d9ce1220133395ba0172b371aec077c16.tar.gz gdb-331d2d0d9ce1220133395ba0172b371aec077c16.tar.bz2 | |
gas/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (output_insn): Support Intel Merom New
Instructions.
* gas/config/tc-i386.h (CpuMNI): New.
(CpuUnknownFlags): Add CpuMNI.
gas/testsuite/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add merom and x86-64-merom.
* gas/i386/merom.d: New file.
* gas/i386/merom.s: Likewise.
* gas/i386/x86-64-merom.d: Likewise.
* gas/i386/x86-64-merom.s: Likewise.
include/opcode/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Merom New Instructions.
opcodes/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
Intel Merom New Instructions.
(THREE_BYTE_0): Likewise.
(THREE_BYTE_1): Likewise.
(three_byte_table): Likewise.
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
THREE_BYTE_1 for entry 0x3a.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(print_insn): Handle 3-byte opcodes used by Intel Merom New
Instructions.
Diffstat (limited to 'gas/config/tc-i386.h')
| -rw-r--r-- | gas/config/tc-i386.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index 0a9cd1c..9851704 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -184,6 +184,7 @@ typedef struct #define CpuPadLock 0x40000 /* VIA PadLock required */ #define CpuSVME 0x80000 /* AMD Secure Virtual Machine Ext-s required */ #define CpuVMX 0x100000 /* VMX Instructions required */ +#define CpuMNI 0x200000 /* Merom New Instructions required */ /* These flags are set by gas depending on the flag_code. */ #define Cpu64 0x4000000 /* 64bit support required */ @@ -192,7 +193,7 @@ typedef struct /* The default value for unknown CPUs - enable all features to avoid problems. */ #define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \ |CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuPNI|CpuVMX \ - |Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock|CpuSVME) + |Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock|CpuSVME|CpuMNI) /* the bits in opcode_modifier are used to generate the final opcode from the base_opcode. These bits also are used to detect alternate forms of |