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author | H.J. Lu <hjl.tools@gmail.com> | 2007-03-12 21:36:23 +0000 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2007-03-12 21:36:23 +0000 |
commit | 8a2ed4898725a7b21481ed0b4fa1c21d9c25f0bd (patch) | |
tree | ac53d09f356ea6ca782f5fdd8de9e575a20a91af /gas/config/tc-i386.h | |
parent | a4fd337476dd0d246549b81b3e5cc8fb3ddc9b00 (diff) | |
download | gdb-8a2ed4898725a7b21481ed0b4fa1c21d9c25f0bd.zip gdb-8a2ed4898725a7b21481ed0b4fa1c21d9c25f0bd.tar.gz gdb-8a2ed4898725a7b21481ed0b4fa1c21d9c25f0bd.tar.bz2 |
2007-03-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Use Opcode_XXX instead of XXX
on i.tm.base_opcode.
(match_template): Likewise.
(process_operands): Use ~0x3 mask to match MOV_AX_DISP32.
* config/tc-i386.h (Opcode_D): New.
(Opcode_FloatR): Likewise.
(Opcode_FloatD): Likewise.
(D): Redefined.
(W): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
Diffstat (limited to 'gas/config/tc-i386.h')
-rw-r--r-- | gas/config/tc-i386.h | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index aa4377c..85bc515 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -159,6 +159,11 @@ typedef struct /* base_opcode is the fundamental opcode byte without optional prefix(es). */ unsigned int base_opcode; +#define Opcode_D 0x2 /* Direction bit: + set if Reg --> Regmem; + unset if Regmem --> Reg. */ +#define Opcode_FloatR 0x8 /* Bit to swap src/dest for float insns. */ +#define Opcode_FloatD 0x400 /* Direction bit for float insns. */ /* extension_opcode is the 3 bit extension for group <n> insns. This field is also used to store the 8-bit opcode suffix for the @@ -207,19 +212,18 @@ typedef struct unsigned int opcode_modifier; /* opcode_modifier bits: */ -#define W 0x1 /* set if operands can be words or dwords +#define D 0x1 /* has direction bit. */ +#define W 0x2 /* set if operands can be words or dwords encoded the canonical way */ -#define D 0x2 /* D = 0 if Reg --> Regmem; - D = 1 if Regmem --> Reg: MUST BE 0x2 */ -#define Modrm 0x4 -#define FloatR 0x8 /* src/dest swap for floats: MUST BE 0x8 */ +#define Modrm 0x4 /* insn has a modrm byte. */ #define ShortForm 0x10 /* register is in low 3 bits of opcode */ -#define FloatMF 0x20 /* FP insn memory format bit, sized by 0x4 */ #define Jump 0x40 /* special case for jump insns. */ #define JumpDword 0x80 /* call and jump */ #define JumpByte 0x100 /* loop and jecxz */ #define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */ -#define FloatD 0x400 /* direction for float insns: MUST BE 0x400 */ +#define FloatMF 0x400 /* FP insn memory format bit, sized by 0x4 */ +#define FloatR 0x800 /* src/dest swap for floats. */ +#define FloatD 0x1000 /* has float insn direction bit. */ #define Size16 0x2000 /* needs size prefix if in 32-bit mode */ #define Size32 0x4000 /* needs size prefix if in 16-bit mode */ #define Size64 0x8000 /* needs size prefix if in 64-bit mode */ |