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| author | H.J. Lu <hjl.tools@gmail.com> | 2011-01-15 15:48:02 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2011-01-15 15:48:02 +0000 |
| commit | 7f56bc95d624e45cf2ff893d1b1fb4b44c49996f (patch) | |
| tree | 65a29682df3c99d4d9ca7ef875f1781f48a793e2 /gas/config/tc-i386.c | |
| parent | 9d53781512bf5608bfc256dbf8a13c7c0ca7d591 (diff) | |
| download | gdb-7f56bc95d624e45cf2ff893d1b1fb4b44c49996f.zip gdb-7f56bc95d624e45cf2ff893d1b1fb4b44c49996f.tar.gz gdb-7f56bc95d624e45cf2ff893d1b1fb4b44c49996f.tar.bz2 | |
Don't allow movabs with relocation in x32 mode.
gas/
2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (disallow_64bit_disp): New.
(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
X86_64_ABI/X86_64_X32_ABI.
(md_assemble): Don't allow movabs with relocation in x32 mode.
(i386_target_format): Updated.
gas/testsuite/
2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/ilp32/ilp32.exp: Run inval.
* gas/i386/ilp32/inval.l: New.
* gas/i386/ilp32/inval.s: Likewise.
* gas/i386/ilp32/x86-64.s: Likewise.
* gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s. Updated.
Diffstat (limited to 'gas/config/tc-i386.c')
| -rw-r--r-- | gas/config/tc-i386.c | 35 |
1 files changed, 24 insertions, 11 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 5c880b7..15eed14 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -389,6 +389,7 @@ enum flag_code { static enum flag_code flag_code; static unsigned int object_64bit; +static unsigned int disallow_64bit_disp; static int use_rela_relocations = 0; #if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \ @@ -399,8 +400,8 @@ static int use_rela_relocations = 0; enum x86_elf_abi { I386_ABI, - X86_64_LP64_ABI, - X86_64_ILP32_ABI + X86_64_ABI, + X86_64_X32_ABI }; static enum x86_elf_abi x86_elf_abi = I386_ABI; @@ -3005,10 +3006,21 @@ md_assemble (char *line) /* Don't optimize displacement for movabs since it only takes 64bit displacement. */ if (i.disp_operands - && !i.disp32_encoding - && (flag_code != CODE_64BIT - || strcmp (mnemonic, "movabs") != 0)) - optimize_disp (); + && !i.disp32_encoding) + { + if (flag_code == CODE_64BIT) + { + if (strcmp (mnemonic, "movabs") == 0) + { + if (disallow_64bit_disp) + as_bad (_("'movabs' isn't supported in x32 mode")); + } + else + optimize_disp (); + } + else + optimize_disp (); + } /* Next, we find a template that matches the given insn, making sure the overlap of the given operands types is consistent @@ -8575,9 +8587,9 @@ i386_target_format (void) { update_code_flag (CODE_64BIT, 1); if (default_arch[6] == '\0') - x86_elf_abi = X86_64_LP64_ABI; + x86_elf_abi = X86_64_ABI; else - x86_elf_abi = X86_64_ILP32_ABI; + x86_elf_abi = X86_64_X32_ABI; } else if (!strcmp (default_arch, "i386")) update_code_flag (CODE_32BIT, 1); @@ -8617,20 +8629,21 @@ i386_target_format (void) default: format = ELF_TARGET_FORMAT; break; - case X86_64_LP64_ABI: + case X86_64_ABI: use_rela_relocations = 1; object_64bit = 1; format = ELF_TARGET_FORMAT64; break; - case X86_64_ILP32_ABI: + case X86_64_X32_ABI: use_rela_relocations = 1; object_64bit = 1; + disallow_64bit_disp = 1; format = ELF_TARGET_FORMAT32; break; } if (cpu_arch_isa == PROCESSOR_L1OM) { - if (x86_elf_abi != X86_64_LP64_ABI) + if (x86_elf_abi != X86_64_ABI) as_fatal (_("Intel L1OM is 64bit only")); return ELF_TARGET_L1OM_FORMAT; } |