diff options
author | H.J. Lu <hjl.tools@gmail.com> | 2010-01-27 14:34:40 +0000 |
---|---|---|
committer | H.J. Lu <hjl.tools@gmail.com> | 2010-01-27 14:34:40 +0000 |
commit | 539f890d013e8ad93b9183ea3ab3f7a6f82c892b (patch) | |
tree | fae215b4e966c1d67609e030f383fd8f6f91537c /gas/config/tc-i386.c | |
parent | bf102f86b1adeb95ed022cb756b2617f674ea94f (diff) | |
download | gdb-539f890d013e8ad93b9183ea3ab3f7a6f82c892b.zip gdb-539f890d013e8ad93b9183ea3ab3f7a6f82c892b.tar.gz gdb-539f890d013e8ad93b9183ea3ab3f7a6f82c892b.tar.bz2 |
Allow VL=1 on AVX scalar instructions.
gas/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (avxscalar): New.
(OPTION_MAVXSCALAR): Likewise.
(build_vex_prefix): Select vector_length for scalar instructions
based on avxscalar.
(md_longopts): Add OPTION_MAVXSCALAR.
(md_parse_option): Handle OPTION_MAVXSCALAR.
(md_show_usage): Add -mavxscalar=.
* doc/c-i386.texi: Document -mavxscalar=.
gas/testsuite/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/avx-scalar-intel.d: New.
* gas/i386/avx-scalar.d: Likewise.
* gas/i386/avx-scalar.s: Likewise.
* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
* gas/i386/x86-64-avx-scalar.d: Likewise.
* gas/i386/x86-64-avx-scalar.s: Likewise.
* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
x86-64-avx-scalar and x86-64-avx-scalar-intel.
opcodes/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMScalar): New.
(EXdScalar): Likewise.
(EXqScalar): Likewise.
(EXqScalarS): Likewise.
(VexScalar): Likewise.
(EXdVexScalarS): Likewise.
(EXqVexScalarS): Likewise.
(XMVexScalar): Likewise.
(scalar_mode): Likewise.
(d_scalar_mode): Likewise.
(d_scalar_swap_mode): Likewise.
(q_scalar_mode): Likewise.
(q_scalar_swap_mode): Likewise.
(vex_scalar_mode): Likewise.
(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
q_scalar_mode, q_scalar_swap_mode.
(OP_XMM): Handle scalar_mode.
(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
and q_scalar_swap_mode.
(OP_VEX): Handle vex_scalar_mode.
Diffstat (limited to 'gas/config/tc-i386.c')
-rw-r--r-- | gas/config/tc-i386.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 7f5ced7..4a71209 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -448,6 +448,13 @@ static unsigned int no_cond_jump_promotion = 0; /* Encode SSE instructions with VEX prefix. */ static unsigned int sse2avx; +/* Encode scalar AVX instructions with specific vector length. */ +static enum + { + vex128 = 0, + vex256 + } avxscalar; + /* Pre-defined "_GLOBAL_OFFSET_TABLE_". */ static symbolS *GOT_symbol; @@ -2706,7 +2713,10 @@ build_vex_prefix (const insn_template *t) i.tm = t[1]; } - vector_length = i.tm.opcode_modifier.vex == VEX256 ? 1 : 0; + if (i.tm.opcode_modifier.vex == VEXScalar) + vector_length = avxscalar; + else + vector_length = i.tm.opcode_modifier.vex == VEX256 ? 1 : 0; switch ((i.tm.base_opcode >> 8) & 0xff) { @@ -7868,6 +7878,7 @@ const char *md_shortopts = "qn"; #define OPTION_MOLD_GCC (OPTION_MD_BASE + 9) #define OPTION_MSSE2AVX (OPTION_MD_BASE + 10) #define OPTION_MSSE_CHECK (OPTION_MD_BASE + 11) +#define OPTION_MAVXSCALAR (OPTION_MSSE_CHECK + 11) struct option md_longopts[] = { @@ -7886,6 +7897,7 @@ struct option md_longopts[] = {"mold-gcc", no_argument, NULL, OPTION_MOLD_GCC}, {"msse2avx", no_argument, NULL, OPTION_MSSE2AVX}, {"msse-check", required_argument, NULL, OPTION_MSSE_CHECK}, + {"mavxscalar", required_argument, NULL, OPTION_MAVXSCALAR}, {NULL, no_argument, NULL, 0} }; size_t md_longopts_size = sizeof (md_longopts); @@ -8096,6 +8108,15 @@ md_parse_option (int c, char *arg) as_fatal (_("Invalid -msse-check= option: `%s'"), arg); break; + case OPTION_MAVXSCALAR: + if (strcasecmp (arg, "128") == 0) + avxscalar = vex128; + else if (strcasecmp (arg, "256") == 0) + avxscalar = vex256; + else + as_fatal (_("Invalid -mavxscalar= option: `%s'"), arg); + break; + default: return 0; } @@ -8220,6 +8241,9 @@ md_show_usage (FILE *stream) -msse-check=[none|error|warning]\n\ check SSE instructions\n")); fprintf (stream, _("\ + -mavxscalar=[128|256] encode scalar AVX instructions with specific vector\n\ + length\n")); + fprintf (stream, _("\ -mmnemonic=[att|intel] use AT&T/Intel mnemonic\n")); fprintf (stream, _("\ -msyntax=[att|intel] use AT&T/Intel syntax\n")); |