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authorTomer Levi <Tomer.Levi@nsc.com>2004-10-07 14:48:08 +0000
committerTomer Levi <Tomer.Levi@nsc.com>2004-10-07 14:48:08 +0000
commite3c52c539f2eaf7289df290d6ac7bb89267833f2 (patch)
treeb5a6d1fce95fb4d68037e0b582eeb1c8cb892a9a /gas/config/tc-crx.c
parent8fdd7217a7e29f1ffac4abb2bffbf5a6555b85b7 (diff)
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Add error checking for Co-Processor instructions
Diffstat (limited to 'gas/config/tc-crx.c')
-rw-r--r--gas/config/tc-crx.c18
1 files changed, 17 insertions, 1 deletions
diff --git a/gas/config/tc-crx.c b/gas/config/tc-crx.c
index 6c144b3..b1063a0 100644
--- a/gas/config/tc-crx.c
+++ b/gas/config/tc-crx.c
@@ -1710,7 +1710,7 @@ parse_insn (ins *insn, char *operands)
return;
}
- /* Handle load/stor post-increment instructions. */
+ /* Handle load/stor unique instructions before parsing. */
if (IS_INSN_TYPE (LD_STOR_INS))
handle_LoadStor (operands);
@@ -2111,6 +2111,22 @@ assemble_insn (char *mnemonic, ins *insn)
else
/* Full match - print the final image. */
{
+ /* Error checking for Co-Processor instructions :
+ The internal coprocessor 0 can only accept the
+ "mtcr" and "mfcr" instructions. */
+ if (IS_INSN_TYPE (COP_REG_INS) || IS_INSN_TYPE (COPS_REG_INS)
+ || IS_INSN_TYPE (COP_BRANCH_INS))
+ {
+ /* The coprocessor id is always the first argument. */
+ if ((instruction->operands[0].op_type == i4)
+ && (insn->arg[0].constant == 0)
+ && (! IS_INSN_MNEMONIC ("mtcr")
+ && ! IS_INSN_MNEMONIC ("mfcr")))
+ {
+ as_bad (_("Internal Coprocessor 0 doesn't support instruction `%s'"),
+ mnemonic);
+ }
+ }
/* Handle positive constants. */
if (!signflag)
{