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author | Mike Frysinger <vapier@gentoo.org> | 2010-09-22 20:59:00 +0000 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2010-09-22 20:59:00 +0000 |
commit | 73a63ccf2f0f856eebf7fee67309fe2a276c39d6 (patch) | |
tree | 0ef34ab3fbb1c9e11d03994bf9ff5de520987243 /gas/config/tc-bfin.c | |
parent | 59a82d2333aec12b174ad37f2f385afbfe06cf45 (diff) | |
download | gdb-73a63ccf2f0f856eebf7fee67309fe2a276c39d6.zip gdb-73a63ccf2f0f856eebf7fee67309fe2a276c39d6.tar.gz gdb-73a63ccf2f0f856eebf7fee67309fe2a276c39d6.tar.bz2 |
opcodes/gas: blackfin: support OUTC debug insn
The disassembler has partial (but incomplete/broken) support already for
the pseudo debug insn OUTC, so let's fix it up and finish it. And now
that the disassembler can handle it, make sure our assembler can output
it too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'gas/config/tc-bfin.c')
-rw-r--r-- | gas/config/tc-bfin.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/config/tc-bfin.c b/gas/config/tc-bfin.c index 5746904..ccd14cb 100644 --- a/gas/config/tc-bfin.c +++ b/gas/config/tc-bfin.c @@ -1820,6 +1820,16 @@ bfin_gen_pseudodbg_assert (int dbgop, REG_T regtest, int expected) return GEN_OPCODE32 (); } +INSTR_T +bfin_gen_pseudochr (int ch) +{ + INIT (PseudoChr); + + ASSIGN (ch); + + return GEN_OPCODE16 (); +} + /* Multiple instruction generation. */ INSTR_T |