diff options
author | Nick Clifton <nickc@redhat.com> | 2017-01-23 15:23:07 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2017-01-23 15:23:07 +0000 |
commit | 33eaf5de31b248f84ae108cf0cf4e1664db9ee51 (patch) | |
tree | f3634c9429c1b925928ca168737186c1c31f3a4a /gas/config/tc-avr.c | |
parent | 715e99a4980aeeb6511eded2e9d5ffe1b063f21e (diff) | |
download | gdb-33eaf5de31b248f84ae108cf0cf4e1664db9ee51.zip gdb-33eaf5de31b248f84ae108cf0cf4e1664db9ee51.tar.gz gdb-33eaf5de31b248f84ae108cf0cf4e1664db9ee51.tar.bz2 |
Fix spelling mistakes and typos in the GAS sources.
PR gas/21072
* asintl.h: Fix spelling mistakes and typos.
* atof-generic.c: Likewise.
* bit_fix.h: Likewise.
* config/atof-ieee.c: Likewise.
* config/bfin-defs.h: Likewise.
* config/bfin-parse.y: Likewise.
* config/obj-coff-seh.h: Likewise.
* config/obj-coff.c: Likewise.
* config/obj-evax.c: Likewise.
* config/obj-macho.c: Likewise.
* config/rx-parse.y: Likewise.
* config/tc-aarch64.c: Likewise.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-avr.c: Likewise.
* config/tc-bfin.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-cris.c: Likewise.
* config/tc-crx.c: Likewise.
* config/tc-d10v.c: Likewise.
* config/tc-d30v.c: Likewise.
* config/tc-dlx.c: Likewise.
* config/tc-epiphany.c: Likewise.
* config/tc-frv.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-i386-intel.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m32r.c: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-mep.h: Likewise.
* config/tc-metag.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-mmix.c: Likewise.
* config/tc-mn10200.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-msp430.h: Likewise.
* config/tc-nds32.c: Likewise.
* config/tc-nds32.h: Likewise.
* config/tc-nios2.c: Likewise.
* config/tc-nios2.h: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-pdp11.c: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-pru.c: Likewise.
* config/tc-rx.c: Likewise.
* config/tc-s390.c: Likewise.
* config/tc-score.c: Likewise.
* config/tc-score7.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sh64.c: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-v850.c: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-visium.c: Likewise.
* config/tc-xgate.c: Likewise.
* config/tc-xtensa.c: Likewise.
* config/tc-z80.c: Likewise.
* config/tc-z8k.c: Likewise.
* config/te-vms.c: Likewise.
* config/xtensa-relax.c: Likewise.
* doc/as.texinfo: Likewise.
* doc/c-arm.texi: Likewise.
* doc/c-hppa.texi: Likewise.
* doc/c-i370.texi: Likewise.
* doc/c-i386.texi: Likewise.
* doc/c-m32r.texi: Likewise.
* doc/c-m68k.texi: Likewise.
* doc/c-mmix.texi: Likewise.
* doc/c-msp430.texi: Likewise.
* doc/c-nds32.texi: Likewise.
* doc/c-ns32k.texi: Likewise.
* doc/c-riscv.texi: Likewise.
* doc/c-rx.texi: Likewise.
* doc/c-s390.texi: Likewise.
* doc/c-tic6x.texi: Likewise.
* doc/c-tilegx.texi: Likewise.
* doc/c-tilepro.texi: Likewise.
* doc/c-v850.texi: Likewise.
* doc/c-xgate.texi: Likewise.
* doc/c-xtensa.texi: Likewise.
* dwarf2dbg.c: Likewise.
* ecoff.c: Likewise.
* itbl-ops.c: Likewise.
* listing.c: Likewise.
* macro.c: Likewise.
* po/gas.pot: Likewise.
* read.c: Likewise.
* struc-symbol.h: Likewise.
* symbols.h: Likewise.
* testsuite/gas/arc/relocs-errors.err: Likewise.
* write.c: Likewise.
Diffstat (limited to 'gas/config/tc-avr.c')
-rw-r--r-- | gas/config/tc-avr.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gas/config/tc-avr.c b/gas/config/tc-avr.c index 3eb0942..7214c07 100644 --- a/gas/config/tc-avr.c +++ b/gas/config/tc-avr.c @@ -72,19 +72,19 @@ struct mcu_type_s static struct mcu_type_s mcu_types[] = { {"avr1", AVR_ISA_AVR1, bfd_mach_avr1}, -/* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2, +/* TODO: instruction set for avr2 architecture should be AVR_ISA_AVR2, but set to AVR_ISA_AVR25 for some following version of GCC (from 4.3) for backward compatibility. */ {"avr2", AVR_ISA_AVR25, bfd_mach_avr2}, {"avr25", AVR_ISA_AVR25, bfd_mach_avr25}, -/* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3, +/* TODO: instruction set for avr3 architecture should be AVR_ISA_AVR3, but set to AVR_ISA_AVR3_ALL for some following version of GCC (from 4.3) for backward compatibility. */ {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3}, {"avr31", AVR_ISA_AVR31, bfd_mach_avr31}, {"avr35", AVR_ISA_AVR35, bfd_mach_avr35}, {"avr4", AVR_ISA_AVR4, bfd_mach_avr4}, -/* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5, +/* TODO: instruction set for avr5 architecture should be AVR_ISA_AVR5, but set to AVR_ISA_AVR51 for some following version of GCC (from 4.3) for backward compatibility. */ {"avr5", AVR_ISA_AVR51, bfd_mach_avr5}, @@ -1673,7 +1673,7 @@ md_assemble (char *str) specifications with same mnemonic who's ISA bits matches. This requires include/opcode/avr.h to have the instructions with - same mnenomic to be specified in sequence. */ + same mnemonic to be specified in sequence. */ while ((opcode->isa & avr_mcu->isa) != opcode->isa) { @@ -1819,7 +1819,7 @@ avr_cons_fix_new (fragS *frag, } if (bad) - as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes); + as_bad (_("illegal %s relocation size: %d"), pexp_mod_data->error, nbytes); } static bfd_boolean @@ -1843,7 +1843,7 @@ tc_cfi_frame_initial_instructions (void) cfi_add_CFA_def_cfa (32, return_size); /* Note that AVR consistently uses post-decrement, which means that things - do not line up the same way as for targers that use pre-decrement. */ + do not line up the same way as for targets that use pre-decrement. */ cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size); } |