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| author | Nick Clifton <nickc@redhat.com> | 2011-04-19 07:27:32 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2011-04-19 07:27:32 +0000 |
| commit | ac7f631be1d010ef8efa59a6d862709277e834d8 (patch) | |
| tree | e64ac83f31522c5c358ed8056aaa3b65be7d1a2f /gas/config/tc-arm.c | |
| parent | 1448a0a258317fbe7566a0a3f48970b2a5b3912e (diff) | |
| download | gdb-ac7f631be1d010ef8efa59a6d862709277e834d8.zip gdb-ac7f631be1d010ef8efa59a6d862709277e834d8.tar.gz gdb-ac7f631be1d010ef8efa59a6d862709277e834d8.tar.bz2 | |
* gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask.
* gas/arm/mrs-msr-thumb-v7e-m.s: Likewise.
* gas/arm/arch7.d: Update expected disassembly.
* gas/arm/attr-march-armv7.d: Remove Microcontroller tag.
* gas/arm/blx-bad.d: Only run for ELF based targets.
* gas/arm/mrs-msr-thumb-v6t2.d: Likewise.
* gas/arm/vldm-arm.d: Likewise.
* gas/arm/mrs-msr-thumb-v7-m.d: Likewise.
Remove qualifiers from PSR and IAPSR regsiter names.
* gas/arm/mrs-msr-thumb-v7e-m.d: Likewise.
* gas/arm/thumb2_bcond.d: Update expected disassembly to allow for
relaxing of branch insns.
* gas/arm/thumb32.d: Fix whitespace problems in disassembly.
* config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to
detect M-profile targets.
(do_t_swi): Exclude v7 and higher variants from arm_ext_os test.
(v7m_psrs): Fix typo: basepri_max should be basepri_mask.
* arm-dis.c (psr_name): Revert previous delta.
* arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
Diffstat (limited to 'gas/config/tc-arm.c')
| -rw-r--r-- | gas/config/tc-arm.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 736693e..ff4d090 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -5354,7 +5354,7 @@ parse_psr (char **str, bfd_boolean lhs) const struct asm_psr *psr; char *start; bfd_boolean is_apsr = FALSE; - bfd_boolean m_profile = ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_m); + bfd_boolean m_profile = ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_m); /* CPSR's and SPSR's can now be lowercase. This is just a convenience feature for ease of use and backwards compatibility. */ @@ -11760,7 +11760,9 @@ do_t_swi (void) to ARM_EXT_V6M. */ if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6m)) { - if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_os)) + if (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_os) + /* This only applies to the v6m howver, not later architectures. */ + && ! ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v7)) as_bad (_("SVC is not permitted on this architecture")); ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, arm_ext_os); } @@ -16632,7 +16634,8 @@ static const struct asm_psr v7m_psrs[] = {"psp", 9 }, {"PSP", 9 }, {"primask", 16}, {"PRIMASK", 16}, {"basepri", 17}, {"BASEPRI", 17}, - {"basepri_max", 18}, {"BASEPRI_MAX", 18}, + {"basepri_max", 18}, {"BASEPRI_MAX", 18}, /* Typo, preserved for backwards compatibility. */ + {"basepri_mask",18}, {"BASEPRI_MASK", 18}, {"faultmask", 19}, {"FAULTMASK", 19}, {"control", 20}, {"CONTROL", 20} }; |