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authorNick Clifton <nickc@redhat.com>1999-11-29 15:29:34 +0000
committerNick Clifton <nickc@redhat.com>1999-11-29 15:29:34 +0000
commita64bcdd8d378b892077d2a9ba108f310fa2b9e5b (patch)
treee0b3ebb77721dd0b6b43b411d18c7ade4305f63a /gas/config/tc-arm.c
parent43b4c25efc59aa9651305948196a7b00ae8fdfa1 (diff)
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Fix .force_thumb
Diffstat (limited to 'gas/config/tc-arm.c')
-rw-r--r--gas/config/tc-arm.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index fa61988..c6e2416 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -139,10 +139,11 @@ CONST char FLT_CHARS[] = "rRsSfFdDxXeEpP";
symbolS * GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
#endif
-CONST int md_reloc_size = 8; /* Size of relocation record */
-
-static int thumb_mode = 0; /* non-zero if assembling thumb instructions */
+CONST int md_reloc_size = 8; /* Size of relocation record */
+static int thumb_mode = 0; /* 0: assemble for ARM, 1: assemble for Thumb,
+ 2: assemble for Thumb even though target cpu
+ does not support thumb instructions */
typedef struct arm_fix
{
int thumb_mode;
@@ -1260,7 +1261,7 @@ s_force_thumb (ignore)
if (! thumb_mode)
{
- thumb_mode = 1;
+ thumb_mode = 2;
record_alignment (now_seg, 1);
}
@@ -6068,7 +6069,7 @@ md_assemble (str)
if (opcode)
{
/* Check that this instruction is supported for this CPU. */
- if ((opcode->variants & cpu_variant) == 0)
+ if (thumb_mode == 1 && (opcode->variants & cpu_variant) == 0)
{
as_bad (_("selected processor does not support this opcode"));
return;