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authorDaniel Jacobowitz <drow@false.org>2010-01-13 19:01:10 +0000
committerDaniel Jacobowitz <drow@false.org>2010-01-13 19:01:10 +0000
commitafa62d5e344305d36b8af043030fd6d69af850db (patch)
treef28c3c9b8dd2071559a4c2e3dab8f90806024ea5 /gas/config/tc-arm.c
parent5e6718e49cb919fc92a045c3e1fd69b47573e170 (diff)
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* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP. gas/testsuite/ * gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test. * gas/arm/relax_branch_align.d: Expect a default NOP instruction. * gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with Thumb-2. ld/testsuite/ * ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with -mcpu=cortex-a8.
Diffstat (limited to 'gas/config/tc-arm.c')
-rw-r--r--gas/config/tc-arm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index b0184a5..d5a0ec4 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -10623,7 +10623,7 @@ do_t_nop (void)
{
/* PR9722: Check for Thumb2 availability before
generating a thumb2 nop instruction. */
- if (ARM_CPU_HAS_FEATURE (cpu_variant, arm_arch_t2))
+ if (ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6t2))
{
inst.instruction = THUMB_OP16 (inst.instruction);
inst.instruction |= inst.operands[0].imm << 4;