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author | Paul Brook <paul@codesourcery.com> | 2007-04-19 17:08:21 +0000 |
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committer | Paul Brook <paul@codesourcery.com> | 2007-04-19 17:08:21 +0000 |
commit | 076d447c3140170dbfa9cddfc2b1073da8c84954 (patch) | |
tree | 4f400514d90850c9464428969c1a8f5f49fef135 /gas/config/tc-arm.c | |
parent | 16a4cf17771801337d9306f596c58deb467c52da (diff) | |
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2007-04-19 Paul Brook <paul@codesourcery.com>
gas/testsuite/
* gas/arm/thumb1_unified.d: New test.
* gas/arm/thumb1_unified.s: New test.
gas/
* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
Thumb-1. Add sanity check for bogus relaxations.
Diffstat (limited to 'gas/config/tc-arm.c')
-rw-r--r-- | gas/config/tc-arm.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 4e3afec0..62360f1 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -14110,6 +14110,14 @@ md_assemble (char *str) return; } + if (!ARM_CPU_HAS_FEATURE (variant, arm_ext_v6t2) && !inst.size_req) + { + /* Implicit require narrow instructions on Thumb-1. This avoids + relaxation accidentally introducing Thumb-2 instructions. */ + if (opcode->tencode != do_t_blx && opcode->tencode != do_t_branch23) + inst.size_req = 2; + } + /* Check conditional suffixes. */ if (current_it_mask) { @@ -14151,6 +14159,11 @@ md_assemble (char *str) return; } } + + /* Something has gone badly wrong if we try to relax a fixed size + instruction. */ + assert (inst.size_req == 0 || !inst.relax); + ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, *opcode->tvariant); /* Many Thumb-2 instructions also have Thumb-1 variants, so explicitly |