diff options
| author | Bernd Schmidt <bernds@codesourcery.com> | 2009-08-11 18:44:12 +0000 |
|---|---|---|
| committer | Bernd Schmidt <bernds@codesourcery.com> | 2009-08-11 18:44:12 +0000 |
| commit | 6306cd859b2bcf64e05f546679c7d7b4a8baa9a8 (patch) | |
| tree | 217162df131351065693a82523c2cf7aeb2bcf40 /gas/config/bfin-parse.y | |
| parent | d55cb1c59e12fdb19d25fab16efc564fa5d85a8a (diff) | |
| download | gdb-6306cd859b2bcf64e05f546679c7d7b4a8baa9a8.zip gdb-6306cd859b2bcf64e05f546679c7d7b4a8baa9a8.tar.gz gdb-6306cd859b2bcf64e05f546679c7d7b4a8baa9a8.tar.bz2 | |
From Jie Zhang <jie.zhang@analog.com>
* config/tc-bfin.h (bfin_anomaly_checks): Declare.
(AC_05000074): Define.
(ENABLE_AC_05000074): Define.
* config/tc-bfin.c (enum bfin_cpu_type): New.
(bfin_cpu_t): Typedef.
(bfin_cpu_type): Define.
(bfin_si_revision): Define.
(bfin_anomaly_checks): Define.
(struct bfin_cpu): New.
(bfin_cpus[]): New. (struct bfin_cpu_isa): Define.
(bfin_isa): New global variable.
(OPTION_MCPU): Define.
(md_longopts[]): Add -mcpu option.
(md_parse_option): Deal with -mcpu option and initialize
bfin_anomaly_checks.
* doc/c-bfin.texi: Rename BFIN to Blackfin throughout. Document
-mcpu option.
* config/bfin-parse.y (gen_multi_instr_1): Check anomaly
05000074.
Diffstat (limited to 'gas/config/bfin-parse.y')
| -rw-r--r-- | gas/config/bfin-parse.y | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y index f64fc02..d22f774 100644 --- a/gas/config/bfin-parse.y +++ b/gas/config/bfin-parse.y @@ -394,6 +394,16 @@ gen_multi_instr_1 (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2) if ((mask1 & mask2) || (mask1 & mask3) || (mask2 & mask3)) yyerror ("resource conflict in multi-issue instruction"); + + /* Anomaly 05000074 */ + if (ENABLE_AC_05000074 + && (dsp32->value & 0xf780) == 0xc680 + && ((dsp16_grp1->value & 0xfe40) == 0x9240 + || (dsp16_grp1->value & 0xfe08) == 0xba08 + || (dsp16_grp1->value & 0xfc00) == 0xbc00)) + yyerror ("anomaly 05000074 - Multi-Issue Instruction with \ +dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported"); + return bfin_gen_multi_instr (dsp32, dsp16_grp1, dsp16_grp2); } |