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authorJie Zhang <jie.zhang@analog.com>2005-11-18 14:21:29 +0000
committerJie Zhang <jie.zhang@analog.com>2005-11-18 14:21:29 +0000
commit73562ad0c76e78ffc052085507181352daea9e7c (patch)
tree730d4620a58da01705b15d2ee9d5c84a6894a88b /gas/config/bfin-parse.y
parenta2140d4d103ed4073fdbec3991334b22218de527 (diff)
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* config/bfin-defs.h (IS_BREG, IS_LREG): New macros.
* config/bfin-parse.y (asm_1): Check register type for load immediate instruction.
Diffstat (limited to 'gas/config/bfin-parse.y')
-rw-r--r--gas/config/bfin-parse.y10
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index 7751b68..f5f1022 100644
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -1189,8 +1189,14 @@ asm_1:
| HALF_REG ASSIGN expr
{
notethat ("LDIMMhalf: pregs_half = imm16\n");
+
+ if (!IS_DREG ($1) && !IS_PREG ($1) && !IS_IREG ($1)
+ && !IS_MREG ($1) && !IS_BREG ($1) && !IS_LREG ($1))
+ return yyerror ("Wrong register for load immediate");
+
if (!IS_IMM ($3, 16) && !IS_UIMM ($3, 16))
return yyerror ("Constant out of range");
+
$$ = LDIMMHALF_R (&$1, IS_H ($1), 0, 0, $3);
}
@@ -1206,6 +1212,10 @@ asm_1:
| REG ASSIGN expr xpmod1
{
+ if (!IS_DREG ($1) && !IS_PREG ($1) && !IS_IREG ($1)
+ && !IS_MREG ($1) && !IS_BREG ($1) && !IS_LREG ($1))
+ return yyerror ("Wrong register for load immediate");
+
if ($4.r0 == 0)
{
/* 7 bit immediate value if possible.