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authorSrinath Parvathaneni <srinath.parvathaneni@arm.com>2023-11-16 12:18:28 +0000
committersrinath <srinath.parvathaneni@arm.com>2023-11-16 12:18:34 +0000
commit311276f10c4f85827d3264a2682ae9219917060f (patch)
tree22824b06a8cd530256bad14437b55f92b2ba8c7d /gas/NEWS
parent43e228e98c33d3dbb428f4061de0362ba13ffbf5 (diff)
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aarch64: Add support to new features in RAS extension.
This patch also adds support for: 1. FEAT_RASv2 feature and "ERXGSR_EL1" system register. RASv2 feature is enabled by passing +rasv2 to -march (eg: -march=armv8-a+rasv2). 2. FEAT_SCTLR2 and following system registers. SCTLR2_EL1, SCTLR2_EL12, SCTLR2_EL2 and SCTLR2_EL3. 3. FEAT_FGT2 and following system registers. HDFGRTR2_EL2, HDFGWTR2_EL2, HFGRTR2_EL2, HFGWTR2_EL2 4. FEAT_PFAR and following system registers. PFAR_EL1, PFAR_EL2 and PFAR_EL12. FEAT_RASv2, FEAT_SCTLR2, FEAT_FGT2 and FEAT_PFAR features are by default enabled from Armv9.4-A architecture. This patch also adds support for two read only system registers id_aa64mmfr3_el1 and id_aa64mmfr4_el1, which are available from Armv8-A Architecture.
Diffstat (limited to 'gas/NEWS')
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diff --git a/gas/NEWS b/gas/NEWS
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+++ b/gas/NEWS
@@ -1,5 +1,8 @@
-*- text -*-
+* Add support for Reliability, Availability and Serviceability extension v2
+ (RASv2) for AArch64.
+
* Add support for 128-bit Atomic Instructions (LSE128) for AArch64.
* Add support for Guarded Control Stack (GCS) for AArch64.