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| author | H.J. Lu <hjl.tools@gmail.com> | 2019-03-19 21:12:47 +0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2019-03-19 21:13:49 +0800 |
| commit | 392a59728b7286d5fd1a1c377de3c40334bbb36f (patch) | |
| tree | 9d2f03c918633a003f3e82c5790917b97ef7ec66 /gas/ChangeLog | |
| parent | 7b1d7ca194544554f7d41aea7fdf7a69c232f15d (diff) | |
| download | gdb-392a59728b7286d5fd1a1c377de3c40334bbb36f.zip gdb-392a59728b7286d5fd1a1c377de3c40334bbb36f.tar.gz gdb-392a59728b7286d5fd1a1c377de3c40334bbb36f.tar.bz2 | |
x86: Correct EVEX vector load/store optimization
Update EVEX vector load/store optimization:
1. There is no need to check AVX since AVX2 is required for AVX512F.
2. We need to check both operands for ZMM register since AT&T syntax
may not set zmmword on the first operand.
3. Update Opcode_SIMD_IntD check and set.
4. Since the VEX prefix has 2 or 3 bytes, the EVEX prefix has 4 bytes,
EVEX Disp8 has 1 byte and VEX Disp32 has 4 bytes, we choose EVEX Disp8
over VEX Disp32.
* config/tc-i386.c (optimize_encoding): Don't check AVX for
EVEX vector load/store optimization. Check both operands for
ZMM register. Update EVEX vector load/store opcode check.
Choose EVEX Disp8 over VEX Disp32.
* testsuite/gas/i386/optimize-1.d: Updated.
* testsuite/gas/i386/optimize-1a.d: Likewise.
* testsuite/gas/i386/optimize-2.d: Likewise.
* testsuite/gas/i386/optimize-4.d: Likewise.
* testsuite/gas/i386/optimize-5.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-2a.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-2b.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-3.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-5.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-6.d: Likewise.
* testsuite/gas/i386/optimize-1.s: Add ZMM register load
test.
* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index b246751..27db914 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,26 @@ 2019-03-19 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (optimize_encoding): Don't check AVX for + EVEX vector load/store optimization. Check both operands for + ZMM register. Update EVEX vector load/store opcode check. + Choose EVEX Disp8 over VEX Disp32. + * testsuite/gas/i386/optimize-1.d: Updated. + * testsuite/gas/i386/optimize-1a.d: Likewise. + * testsuite/gas/i386/optimize-2.d: Likewise. + * testsuite/gas/i386/optimize-4.d: Likewise. + * testsuite/gas/i386/optimize-5.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2a.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-2b.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-3.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-5.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-6.d: Likewise. + * testsuite/gas/i386/optimize-1.s: Add ZMM register load + test. + * testsuite/gas/i386/x86-64-optimize-2.s: Likewise. + +2019-03-19 H.J. Lu <hongjiu.lu@intel.com> + PR gas/24352 * config/tc-i386.c (optimize_encoding): Check only cpu_arch_flags.bitfield.cpuavx512vl. |