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| author | Jan Beulich <jbeulich@suse.com> | 2019-07-16 09:31:36 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2019-07-16 09:31:36 +0200 |
| commit | dfd6917457a3030ea4a4b6356f65216fab92d0b8 (patch) | |
| tree | 564ff316e799585e35f21a1cec2393a4d5d11e4d /gas/ChangeLog | |
| parent | 21df382b918888de64749e977f185c4e10a5b838 (diff) | |
| download | gdb-dfd6917457a3030ea4a4b6356f65216fab92d0b8.zip gdb-dfd6917457a3030ea4a4b6356f65216fab92d0b8.tar.gz gdb-dfd6917457a3030ea4a4b6356f65216fab92d0b8.tar.bz2 | |
x86: make RegMem an opcode modifier
... instead of an operand type bit: It's an insn property, not an
operand one. There's just one actual change to be made to the
templates: Most are now required to have the (unswapped) destination go
into ModR/M.rm, so VMOVD template needs its opcode adjusted accordingly
and its operands swapped. {,V}MOVS{S,D}, otoh, are left alone in this
regard, as otherwise generated code would differ from what we've been
producing so far (which I don't think is wanted).
Take the opportunity and add a missing IgnoreSize to pextrb (leading to
an error in 16-bit mode), and take the liberty to once again drop stray
IgnoreSize attributes from lines changed and neighboring related ones.
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index bdff6e4..7219193 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,12 @@ 2019-07-16 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (match_template): Adjust regmem reference. + Adjust comment and update regmem when swapping operands. + (build_modrm_byte): Drop clearing of regmem and stale part of + comment. Correct comment. Adjust regmem reference. + +2019-07-16 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (type_names): Replace SReg entries. (pi, check_byte_reg, build_modrm_byte, i386_att_operand, parse_real_register): Switch to using sreg field. |