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authorTamar Christina <tamar.christina@arm.com>2018-10-03 18:27:52 +0100
committerTamar Christina <tamar.christina@arm.com>2018-10-03 18:33:33 +0100
commit7e84b55d8f973b011f55f604a76c2d1d989d0b6b (patch)
tree1d860bb0c911056c9fed87fc0b3e46ec30723c91 /gas/ChangeLog
parenteae424aef0b14e1765602088ac866b95d14d4a22 (diff)
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AArch64: Wire through instr_sequence
This patch introduces aarch64_instr_sequence which is a structure similar to IT blocks on Arm in order to track instructions that introduce a constraint or dependency on instruction 1..N positions away from the instruction that opened the block. The struct is also wired through to the locations that require it. gas/ * config/tc-aarch64.c (now_instr_sequence): (*insn_sequence, now_instr_sequence): New. (output_operand_error_record, do_encode): Add insn_sequence. (md_assemble): Update insn_sequence. (try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn): Pass insn_sequence. * config/tc-aarch64.h (struct aarch64_segment_info_type): Add insn_sequence. include/ * opcode/aarch64.h (struct aarch64_instr_sequence): New. (aarch64_opcode_encode): Use it. opcodes/ * aarch64-asm.c (aarch64_opcode_encode): Add insn_sequence. * aarch64-dis.c (insn_sequence): New.
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diff --git a/gas/ChangeLog b/gas/ChangeLog
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--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2018-10-03 Tamar Christina <tamar.christina@arm.com>
+
+ * config/tc-aarch64.c (now_instr_sequence):
+ (*insn_sequence, now_instr_sequence): New.
+ (output_operand_error_record, do_encode): Add insn_sequence.
+ (md_assemble): Update insn_sequence.
+ (try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn):
+ Pass insn_sequence.
+ * config/tc-aarch64.h (struct aarch64_segment_info_type):
+ Add insn_sequence.
+
2018-10-02 Palmer Dabbelt <palmer@sifive.com>
* testsuite/gas/riscv/fence-tso.d: New file.