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author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2017-12-20 13:59:14 +0100 |
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committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2017-12-20 13:59:14 +0100 |
commit | 396d3980f518cfc9a936e3fb8138b0492399525a (patch) | |
tree | ad8c22608a21fd3eca3f73702feffcadf75e3463 /gas/ChangeLog | |
parent | 175654b9cdd3113a01174b019ac286092398246b (diff) | |
download | gdb-396d3980f518cfc9a936e3fb8138b0492399525a.zip gdb-396d3980f518cfc9a936e3fb8138b0492399525a.tar.gz gdb-396d3980f518cfc9a936e3fb8138b0492399525a.tar.bz2 |
[Cell/B.E.] Fix regression due to gdbarch_significant_addr_bit
On Cell/B.E. multi-architecture debugging we use a "merged" address space
that encodes both the main PowerPC address space and the local store address
spaces of all active SPUs. This will always occupy 64 bits.
However, gdbarch_addr_bit is set to 32 on SPU, and may be set to 32 as well
on PowerPC. Since the new gdbarch_significant_addr_bit defaults to the
value of gdbarch_addr_bit, this means addresses may be improperly truncated.
Work around this problem by explicitly setting gdbarch_significant_addr_bit
to 64 both for the SPU target and also for PowerPC target that support
Cell/B.E. execution.
gdb/ChangeLog:
2017-12-20 Ulrich Weigand <uweigand@de.ibm.com>
* spu-tdep.c (spu_gdbarch_init): Set set_gdbarch_significant_addr_bit
to 64 bits.
(ppc_linux_init_abi): Likewise, if Cell/B.E. is supported.
Diffstat (limited to 'gas/ChangeLog')
0 files changed, 0 insertions, 0 deletions