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authorJan Beulich <jbeulich@suse.com>2019-07-01 08:31:14 +0200
committerJan Beulich <jbeulich@suse.com>2019-07-01 08:31:14 +0200
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x86: optimize EVEX packed integer logical instructions
As long as there's no write mask as well as no broadcast, and as long as the scaled Disp8 wouldn't result in a shorter EVEX encoding, encode VPAND{D,Q}, VPANDN{D,Q}, VPOR{D,Q}, and VPXOR{D,Q} acting on only the lower 16 XMM/YMM registers using their VEX equivalents with -O1. Also take the opportunity and avoid looping twice over all operands when dealing with memory-with-displacement ones.
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2019-07-01 Jan Beulich <jbeulich@suse.com>
+ * config/tc-i386.c (optimize_encoding): Make j unsigned. Handle
+ vpand{d,q}, vpandn{d,q}, vpor{d,q}, and vpxor{d,q}. Also check/
+ clear broadcast. Eliminate a loop.
+ * doc/c-i386.texi: Update -O1 documentation.
+ * testsuite/gas/i386/optimize-1.s,
+ testsuite/gas/i386/optimize-2.s,
+ testsuite/gas/i386/optimize-3.s,
+ testsuite/gas/i386/optimize-5.s,
+ testsuite/gas/i386/x86-64-optimize-2.s,
+ testsuite/gas/i386/x86-64-optimize-3.s,
+ testsuite/gas/i386/x86-64-optimize-4.s,
+ testsuite/gas/i386/x86-64-optimize-6.s: Add vpand{d,q},
+ vpandn{d,q}, vpor{d,q}, and vpxor{d,q} cases.
+ testsuite/gas/i386/optimize-1.d,
+ testsuite/gas/i386/optimize-1a.d,
+ testsuite/gas/i386/optimize-2.d,
+ testsuite/gas/i386/optimize-3.d,
+ testsuite/gas/i386/optimize-4.d,
+ testsuite/gas/i386/optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-2.d,
+ testsuite/gas/i386/x86-64-optimize-2a.d,
+ testsuite/gas/i386/x86-64-optimize-2b.d,
+ testsuite/gas/i386/x86-64-optimize-3.d,
+ testsuite/gas/i386/x86-64-optimize-4.d,
+ testsuite/gas/i386/x86-64-optimize-5.d,
+ testsuite/gas/i386/x86-64-optimize-6.d: Adjust expectations.
+
+2019-07-01 Jan Beulich <jbeulich@suse.com>
+
* testsuite/gas/i386/avx512f_vpclmulqdq.s,
testsuite/gas/i386/avx512vl_vpclmulqdq.s,
testsuite/gas/i386/vpclmulqdq.s,