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| author | H.J. Lu <hjl.tools@gmail.com> | 2018-03-08 19:57:35 -0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2018-03-08 19:57:48 -0800 |
| commit | 0089daceaba4338046932e65a1b5882065416633 (patch) | |
| tree | 779e5859464843e858b513e0eedbec3c07c949a6 /gas/ChangeLog | |
| parent | 567a3e54d211ab8d09119f99fed10b57db895450 (diff) | |
| download | gdb-0089daceaba4338046932e65a1b5882065416633.zip gdb-0089daceaba4338046932e65a1b5882065416633.tar.gz gdb-0089daceaba4338046932e65a1b5882065416633.tar.bz2 | |
x86: Optimize with EVEX128 encoding for AVX512VL
We can optimize AVX512 instructions with EVEX128 only if AVX512VL is
enabled:
1. Instruction is an AVX512VL instruction. Or
2. AVX512VL is enabled explicitly by -march=+avx512vl/".arch .avx512vl".
We should optimize EVEX instructions with EVEX128 encoding when pseudo
{evex} prefix is used.
* config/tc-i386.c (set_cpu_arch): Set cpu_arch_isa_flags.
(md_parse_option): Likewise.
(optimize_encoding): Check i.tm.cpu_flags and cpu_arch_isa_flags
for cpuavx512vl instead of cpu_arch_flags. Optimize EVEX with
EVEX128 when EVEX encoding is required.
* testsuite/gas/i386/i386.exp: Run optimize-4, optimize-5,
x86-64-optimize-5 and x86-64-optimize-6.
* testsuite/gas/i386/optimize-1.d: Updated.
* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
* testsuite/gas/i386/optimize-4.d: New file.
* testsuite/gas/i386/optimize-4.s: Likewise.
* testsuite/gas/i386/optimize-5.d: Likewise.
* testsuite/gas/i386/optimize-5.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-5.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-5.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-6.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-6.s: Likewise.
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 7c37f13..0cf0108 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,25 @@ 2018-03-08 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (set_cpu_arch): Set cpu_arch_isa_flags. + (md_parse_option): Likewise. + (optimize_encoding): Check i.tm.cpu_flags and cpu_arch_isa_flags + for cpuavx512vl instead of cpu_arch_flags. Optimize EVEX with + EVEX128 when EVEX encoding is required. + * testsuite/gas/i386/i386.exp: Run optimize-4, optimize-5, + x86-64-optimize-5 and x86-64-optimize-6. + * testsuite/gas/i386/optimize-1.d: Updated. + * testsuite/gas/i386/x86-64-optimize-2.d: Likewise. + * testsuite/gas/i386/optimize-4.d: New file. + * testsuite/gas/i386/optimize-4.s: Likewise. + * testsuite/gas/i386/optimize-5.d: Likewise. + * testsuite/gas/i386/optimize-5.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-5.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-5.s: Likewise. + * testsuite/gas/i386/x86-64-optimize-6.d: Likewise. + * testsuite/gas/i386/x86-64-optimize-6.s: Likewise. + +2018-03-08 H.J. Lu <hongjiu.lu@intel.com> + * config/tc-i386.c (optimize_encoding): Also encode "clr reg64" as "xor reg32, reg32". * testsuite/gas/i386/x86-64-optimize-1.s: Add "clr reg64" tests. |