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| author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2014-10-09 13:16:53 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2014-10-09 13:16:53 +0100 |
| commit | 3d68f91c0fb05b426e554004cabd3ded4c91f9c8 (patch) | |
| tree | 0297b29c1d0d20a3d36868c0357e23a0db4f6efd /gas/ChangeLog | |
| parent | fcbdedf866d777b3598cf8703737eb0f987c2aca (diff) | |
| download | gdb-3d68f91c0fb05b426e554004cabd3ded4c91f9c8.zip gdb-3d68f91c0fb05b426e554004cabd3ded4c91f9c8.tar.gz gdb-3d68f91c0fb05b426e554004cabd3ded4c91f9c8.tar.bz2 | |
This is a series of patches that add support for the SPARC M7 cpu to
binutils. They were discussed and approved here:
https://sourceware.org/ml/binutils/2014-10/msg00038.html
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index ff149d3..6abdfe3 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,44 @@ +2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> + + * config/tc-sparc.c (v9a_asr_table): Entry for %cps removed. + (sparc_arch_table): Remove the HWCAP_RANDOM, HWCAP_TRANS and + HWCAP_ASI_CACHE_SPARING from the architectures using them. + (HWS_V8): New define. + (HWS_V9): Likewise. + (HWS_VA): Likewise. + (HWS_VB): Likewise. + (HWS_VC): Likewise. + (HWS_VD): Likewise. + (HWS_VE): Likewise. + (HWS_VV): Likewise. + (sparc_arch): Use the HWS_* macros. Fix the `sparc4' architecture + to cover the HWCAP_ASI_BLK_INIT and HWCAP_IMA capabilities. + (hwcap_seen): Variable widened to 64 bits. + (hwcap_allowed): Likewise. + (sparc_arch): new field `hwcap2_allowed'. + (sparc_arch_table): provide hwcap2_allowed values for existing + archs. + (sparc_md_end): Add a HWCAPS2 object attribute to the elf object + in case any of the HWCAP2_* caps are used. + (sparc_ip): Take into account the new hwcaps2 bitmap to build the + list of seen/allowed hwcaps. + (get_hwcap_name): Argument widened to 64 bits to handle HWCAP2 + bits. + (HWS_VM): New define. + (HWS2_VM): Likewise. + (sparc_arch): New architectures `sparc5', `v9m' and `v8plusm'. + (v9a_asr_table): Add the %mwait (%asr28) ancillary state register + to the table. + (sparc_ip): Handle the %mcdper ancillary state register as an + operand. + (sparc_ip): Handle } arguments as fdrd floating point registers + (double) that are the same than frs1. + * doc/c-sparc.texi (Sparc-Opts): Document the -Av9e, -Av8pluse and + -xarch=v9e command line options. Also fix the description of the + -Av9v and -Av8plusv command line options. + Document the -Av9m, -Av8plusm,-Asparc5, -xarch=v9m and + -xarch=sparc5 command line options. + 2014-09-29 Terry Guo <terry.guo@arm.com> * as.c (create_obj_attrs_section): Move it and call it from ... |