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author | Nick Clifton <nickc@redhat.com> | 2000-12-01 21:35:38 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2000-12-01 21:35:38 +0000 |
commit | e7af610e147b2f6f35e2f7dcec4c707027a53757 (patch) | |
tree | 981ed717ac072d086d1100528456686af62f1bf2 /gas/ChangeLog | |
parent | b23da31b1cf7d0b7d2ae1d1c4378f8ff77feaf43 (diff) | |
download | gdb-e7af610e147b2f6f35e2f7dcec4c707027a53757.zip gdb-e7af610e147b2f6f35e2f7dcec4c707027a53757.tar.gz gdb-e7af610e147b2f6f35e2f7dcec4c707027a53757.tar.bz2 |
Add MIPS32 as a seperate MIPS architecture
Diffstat (limited to 'gas/ChangeLog')
-rw-r--r-- | gas/ChangeLog | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 9c8a3df..8de2b35 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -13,6 +13,45 @@ operand specifiers. Change warning generated by 'B' operand specifier to reflect its new multi-purpose usage. + * config/tc-mips.c (mips_set_options): Use ISA_UNKNOWN rather than + -1, and update comment. + (file_mips_isa): Likewise. + (mips_cpu): Use CPU_UNKNOWN rather than -1, and update comment. + (ISA_HAS_COPROC_DELAYS, ISA_HAS_64BIT_REGS, gpr_interlocks): Use + ISA_* constants rather than hard-coded numbers. + (mips_cpu_info): New structure. + (mips_cpu_info_table): New table describing CPU and ISA names + and numbers. + (mips_cpu_info_from_name, mips_cpu_info_from_isa, + mips_cpu_info_from_cpu): New functions. + (mips_isa_to_str): New function to get string for ISA name. + (mips_cpu_to_str): Convert to use mips_cpu_info_from_cpu, and + return const char *. + (md_begin): Redo CPU and ISA selection logic, using + mips_cpu_info_from_*. Convert to use ISA_* constants rather + than hard-coded numbers. + (append_insn, mips_emit_delays, macro, macro2): Convert to use + ISA_* constants rather than hard-coded numbers. + (mips_ip): Convert to use mips_isa_to_str to get ISA name. + (md_longopts): Delete OPTION_NO_MIPS32. + (md_parse_option): Convert to use ISA_* constants rather than + hard-coded numbers. Make OPTIONS_MIPS32 case treat MIPS32 + as an ISA. Delete OPTION_NO_MIPS32 case. Convert OPTION_MCPU + to use strcasecmp to recognize "default" and to use + mips_cpu_info_from_name to get CPU numbers from argument. + (md_show_usage): Move -mips32 so it's with the rest of the ISA + flags. Change 4Kc, 4Kp and 4Km CPU entries to just be + mips32-4k. + (s_mipsset): Accept ISA value 32. + * doc/as.texinfo: Clean up MIPS options summary slightly, + remove -no-mips32. Add note about -mips4 and -mips32 + specifying those ISA levels. Delete -mips32 and -no-mips32 + cpu flag descriptions. + * doc/c-mips.texi: Add -mips32 to list of ISA switches. Clean + up the supported CPU switch list, and replace 4Kc, 4Km, and + 4Kp entries with a single mips32-4k entry. Note that you can + use ".set mips32". + 2000-12-01 Joel Sherrill <joel@OARcorp.com> * configure.in (arm-*-rtems*, a29k-*rtems*, h8300-*-rtems*): |