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| author | Jan Beulich <jbeulich@suse.com> | 2020-02-12 16:19:03 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-02-12 16:19:03 +0100 |
| commit | 5990e377e5a339bce715fabfc3e45b24b459a7af (patch) | |
| tree | d14b42a87167ad6209f6dee222588556eeb8da7b /gas/ChangeLog | |
| parent | f20e3e823d56e54ffe56792ea6a2fe947c2dec0d (diff) | |
| download | gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.zip gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.tar.gz gdb-5990e377e5a339bce715fabfc3e45b24b459a7af.tar.bz2 | |
x86-64: Intel64 adjustments for insns dealing with far pointers
AMD and Intel differ in their handling of far indirect branches as well
as LFS/LGS/LSS: AMD CPUs ignore REX.W while Intel ones honors it. (Note
how the latter three were hybrids so far, while far branches were fully
AMD-like.)
Diffstat (limited to 'gas/ChangeLog')
| -rw-r--r-- | gas/ChangeLog | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 3e08345..e7fac95 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,22 @@ 2020-02-12 Jan Beulich <jbeulich@suse.com> + PR gas/24546 + * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit + code only. + * config/tc-i386-intel.c (i386_intel_operand): Also handle + CALL/JMP in O_tbyte_ptr case. + * doc/c-i386.texi: Mention far call and full pointer load ISA + differences. + * testsuite/gas/i386/x86-64-branch-3.s, + testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases. + * testsuite/gas/i386/x86-64-branch-3.d, + testsuite/gas/i386/x86-64-intel64.d: Adjust expectations. + * testsuite/gas/i386/x86-64-branch-5.l, + testsuite/gas/i386/x86-64-branch-5.s: New. + * testsuite/gas/i386/i386.exp: Run new test. + +2020-02-12 Jan Beulich <jbeulich@suse.com> + PR gas/25438 * config/tc-i386.c (REGISTER_WARNINGS): Delete. (check_byte_reg): Skip only source operand of CRC32. Drop Non- |