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author | Maxim Grigoriev <maxim2405@gmail.com> | 2008-04-23 21:17:05 +0000 |
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committer | Maxim Grigoriev <maxim2405@gmail.com> | 2008-04-23 21:17:05 +0000 |
commit | ee967b5f616f692f59f48cac5ffcb7b0ecd79d70 (patch) | |
tree | 1e1cf4d82d096ade5be77d664573a71801bf058b /depcomp | |
parent | fe4fa32c96bc16ffbdb13ed722f63b88721b5f8d (diff) | |
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2008-04-23 Maxim Grigoriev <maxim2405@gmail.com>
* Makefile.in (xtensa-tdep.o): Update dependencies.
* configure.tgt (xtensa*): Update dependencies.
* xtensa-tdep.c (arreg_number): Renamed from areg_number.
Local variable areg renamed to arreg.
(areg_number): New function.
(xtensa_pseudo_register_read, xtensa_pseudo_register_write)
(xtensa_extract_return_value, xtensa_store_return_value): areg_number
replaced by arreg_number.
(xtensa_windowed_frame_cache, struct xtensa_frame_cache): New comments.
(xtensa_alloc_frame_cache): Initialize cache->wd.ws.
(xtensa_scan_prologue): New function.
(xtensa_frame_cache): New local fp_regnum. Handle separately the case,
when ENTRY instraction hasn't been executed yet. Get the frame pointer
value based on prologue analysis. Fix the bugs preventing WS and
AR4-AR7/A11 registers from getting right values for intermediate frames,
whose registers have been already spilled.
(xtensa_frame_prev_register): Fix WS register value. Use are_number
and arreg_number appropriately.
(xtensa_gdbarch_init): Set solib_svr4_fetch_link_map_offsets to
svr4_ilp32_fetch_link_map_offsets.
Diffstat (limited to 'depcomp')
0 files changed, 0 insertions, 0 deletions