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authorHans-Peter Nilsson <hp@axis.com>2004-12-21 04:37:58 +0000
committerHans-Peter Nilsson <hp@axis.com>2004-12-21 04:37:58 +0000
commitc3d75c30237aafd9aa332b71333b99bb78e4bb3a (patch)
tree124db1e1f268c771b4634bdc0bf4fb1f0388d5b0 /cpu
parent5acea80106608a6f7f94089e9740d69e9e0fb88a (diff)
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* cris.cpu (cris-set-mem): Correct integral write semantics.
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ChangeLog4
-rw-r--r--cpu/cris.cpu5
2 files changed, 8 insertions, 1 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 3eef926..ddbce32 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,7 @@
+2004-12-21 Mikael Starvik <starvik@axis.com>
+
+ * cris.cpu (cris-set-mem): Correct integral write semantics.
+
2004-11-29 Hans-Peter Nilsson <hp@axis.com>
* cris.cpu: New file.
diff --git a/cpu/cris.cpu b/cpu/cris.cpu
index 6bfa539..955ad32 100644
--- a/cpu/cris.cpu
+++ b/cpu/cris.cpu
@@ -2224,7 +2224,10 @@
(sequence
()
(set (mem size addr) value)
- (set cbit 0))
+ ; Write failures are signalled (by whatever entity "sends
+ ; the signal") by setting P at time of the write above, if X
+ ; is set. Here, we just need to copy P into C.
+ (set cbit pbit))
(set cbit 1))
(set (mem size addr) value))