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author | Samanta Navarro <ferivoz@riseup.net> | 2020-10-05 14:20:15 +0100 |
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committer | Nick Clifton <nickc@redhat.com> | 2020-10-05 14:20:15 +0100 |
commit | 0cc79db2b66aa3115ddbf84cb81d1ad8abd38c46 (patch) | |
tree | e56b3c7c8a3d8a9cc07978be5560deeeb25c84e3 /cpu | |
parent | 7d1441178ac6d5b31e3ebf312012c2d5bfaeec91 (diff) | |
download | gdb-0cc79db2b66aa3115ddbf84cb81d1ad8abd38c46.zip gdb-0cc79db2b66aa3115ddbf84cb81d1ad8abd38c46.tar.gz gdb-0cc79db2b66aa3115ddbf84cb81d1ad8abd38c46.tar.bz2 |
Fix spelling mistakes
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/ChangeLog | 4 | ||||
-rw-r--r-- | cpu/m32r.cpu | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 4d68e00..fe52534 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,7 @@ +2020-10-05 Samanta Navarro <ferivoz@riseup.net> + + * m32r.cpu: Fix spelling mistakes. + 2020-09-18 David Faust <david.faust@oracle.com> * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD. diff --git a/cpu/m32r.cpu b/cpu/m32r.cpu index a239525..e85b640 100644 --- a/cpu/m32r.cpu +++ b/cpu/m32r.cpu @@ -742,7 +742,7 @@ (dnop disp16 "16 bit displacement" () h-iaddr f-disp16) (dnop disp24 "24 bit displacement" (RELAX) h-iaddr f-disp24) -; These hardware elements are refered to frequently. +; These hardware elements are referred to frequently. (dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil) (dnop accum "accumulator" (SEM-ONLY) h-accum f-nil) |