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authorAlan Modra <amodra@gmail.com>2019-12-10 18:06:09 +1030
committerAlan Modra <amodra@gmail.com>2019-12-11 11:34:33 +1030
commitb8e61daa1ad56330fd8931c8a53bfa16d8e4a47a (patch)
treeba543454bcef55c770165f89c0430044b063c24e /cpu
parent8ff23dba80b80a9f47d75dd43812e041f6674763 (diff)
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ubsan: epiphany: left shift of negative value
Two places in epiphany_cgen_extract_operand, "value" is a long. value = ((((value) << (1))) + (pc)); cpu/ * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than shift left to avoid UB on left shift of negative values. opcodes/ * epiphany-ibld.c: Regenerate.
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ChangeLog5
-rw-r--r--cpu/epiphany.cpu4
2 files changed, 7 insertions, 2 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 87cec69..fd26cb7 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2019-12-11 Alan Modra <amodra@gmail.com>
+
+ * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
+ shift left to avoid UB on left shift of negative values.
+
2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf.cpu: Fix comment describing the 128-bit instruction format.
diff --git a/cpu/epiphany.cpu b/cpu/epiphany.cpu
index 33c81d0..9f873b3 100644
--- a/cpu/epiphany.cpu
+++ b/cpu/epiphany.cpu
@@ -149,11 +149,11 @@
(df f-simm8 "branch displacement" (PCREL-ADDR RELOC) 15 8 INT
((value pc) (sra SI (sub SI value pc) 1))
- ((value pc) (add SI (sll SI value 1) pc)))
+ ((value pc) (add SI (mul SI value 2) pc)))
(df f-simm24 "branch displacement" (PCREL-ADDR RELOC) 31 24 INT
((value pc) (sra SI (sub SI value pc) 1))
- ((value pc) (add SI (sll SI value 1) pc)))
+ ((value pc) (add SI (mul SI value 2) pc)))
(df f-sdisp3 "signed immediate 3 bit" () 9 3 INT #f #f)