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authorDoug Evans <dje@google.com>2009-09-23 22:30:55 +0000
committerDoug Evans <dje@google.com>2009-09-23 22:30:55 +0000
commitab5f875d24fd1eee651b37a7a01d069dd3b56f00 (patch)
tree607276a04a9f94716a48a6bb52e3f99ab7ff06b1 /cpu/sh.opc
parentbd30e45a3430ce30c63146aa8cad0796754581b6 (diff)
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* m32r.cpu (sth-plus): Fix address mode and calculation.
(stb-plus): Ditto. (clrpsw): Fix mask calculation. (bset, bclr, btst): Make mode in bit calculation match expression. * xc16x.cpu (rtl-version): Set to 0.8. (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, make uppercase. Remove unnecessary name-prefix spec. (grb-names, conditioncode-names, extconditioncode-names): Ditto. (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. (h-cr): New hardware. (muls): Comment out parts that won't compile, add fixme. (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
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