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author | Alan Modra <amodra@gmail.com> | 2020-02-03 11:26:30 +1030 |
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committer | Alan Modra <amodra@gmail.com> | 2020-02-03 15:59:08 +1030 |
commit | 44e4546fa278122fb1ad708cf8d4835a5af0a11c (patch) | |
tree | b2d0f10c84b303858a65213bfee40cb4fba77ef6 /cpu/m32c.cpu | |
parent | ef4627fabaebd4f4a2bc2c5e92c95d747f388d78 (diff) | |
download | gdb-44e4546fa278122fb1ad708cf8d4835a5af0a11c.zip gdb-44e4546fa278122fb1ad708cf8d4835a5af0a11c.tar.gz gdb-44e4546fa278122fb1ad708cf8d4835a5af0a11c.tar.bz2 |
ubsan: m32c: left shift of negative value
cpu/
* m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
opcodes/
* m32c-ibld.c: Regenerate.
Diffstat (limited to 'cpu/m32c.cpu')
-rw-r--r-- | cpu/m32c.cpu | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu index 48b5acd..ab65fc1 100644 --- a/cpu/m32c.cpu +++ b/cpu/m32c.cpu @@ -781,12 +781,12 @@ (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; insert + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; insert ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; extract + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; extract ) ;------------------------------------------------------------- |