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| author | DJ Delorie <dj@redhat.com> | 2007-03-29 23:56:39 +0000 |
|---|---|---|
| committer | DJ Delorie <dj@redhat.com> | 2007-03-29 23:56:39 +0000 |
| commit | 144f4bc66dfb750983d5636340d46f7757cfe9d1 (patch) | |
| tree | 1b467881e2b23c63c8a356f124462cc7b7fa899d /cpu/m32c.cpu | |
| parent | 243c053bbf3e39ba63d2b9e61ee17a8387ee4baa (diff) | |
| download | gdb-144f4bc66dfb750983d5636340d46f7757cfe9d1.zip gdb-144f4bc66dfb750983d5636340d46f7757cfe9d1.tar.gz gdb-144f4bc66dfb750983d5636340d46f7757cfe9d1.tar.bz2 | |
* m32c.cpu (Imm-8-s4n): Fix print hook.
(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
(arith-jnz-imm4-dst-defn): Make relaxable.
(arith-jnz16-imm4-dst-defn): Fix encodings.
* m32c-desc.c: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-opc.c: Regenerate.
* config/tc-m32c.c (rl_for, relaxable): Protect argument.
(md_relax_table): Add entries for ADJNZ macros.
(M32C_Macros): Add ADJNZ macros.
(subtype_mappings): Add entries for ADJNZ macros.
(insn_to_subtype): Check for adjnz and sbjnz insns.
(md_estimate_size_before_relax): Pass insn to insn_to_subtype.
(md_convert_frag): Convert adjnz and sbjnz.
Diffstat (limited to 'cpu/m32c.cpu')
| -rw-r--r-- | cpu/m32c.cpu | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu index 4c76afe..69eec82 100644 --- a/cpu/m32c.cpu +++ b/cpu/m32c.cpu @@ -1939,7 +1939,7 @@ ) (define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas) h-sint DFLT f-imm-8-s4 - ((parse "signed4n")) () () + ((parse "signed4n") (print "signed4n")) () () ) (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas) h-shimm DFLT f-imm-8-s4 @@ -2146,9 +2146,9 @@ (dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16) (dnop Lab-8-24 "24 bit label" (all-isas RELAX) h-iaddr f-lab-8-24) (dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8) -(dnop Lab-24-8 "8 bit label" (all-isas) h-iaddr f-lab-24-8) -(dnop Lab-32-8 "8 bit label" (all-isas) h-iaddr f-lab-32-8) -(dnop Lab-40-8 "8 bit label" (all-isas) h-iaddr f-lab-40-8) +(dnop Lab-24-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-24-8) +(dnop Lab-32-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-32-8) +(dnop Lab-40-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-40-8) ;------------------------------------------------------------- ; Condition code bits @@ -6681,7 +6681,7 @@ (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem) (dni (.sym op mach wstr - imm4 - dstgroup) (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode) - ((machine mach)) + (RL_JUMP RELAXABLE (machine mach)) (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}") encoding (sem mode src (.sym dst mach - dstgroup - mode) label) @@ -6695,10 +6695,10 @@ (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8) sem) (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-16-8) + (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-32-8) sem) (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op - (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-16-8) + (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-24-8) sem) ) ) |