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authorJim Wilson <jim.wilson@linaro.org>2017-02-14 14:35:57 -0800
committerJim Wilson <jim.wilson@linaro.org>2017-02-14 14:35:57 -0800
commitbf25e9a0f1315829defcb6ef36d8fef9d370e822 (patch)
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parente8f42b5e36b2083e36855007442aff110291b6aa (diff)
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Fix bit/bif instructions.
sim/aarch64/ * simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and 2. Move test_false if inside loop. Fix logic for computing result stored to vd. sim/testsuite/sim/aarch64 * bit.s: New.
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