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author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2019-09-24 10:18:12 +0100 |
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committer | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2019-09-24 10:29:18 +0100 |
commit | e449ea97ebd3c11a8da5df174f1a1333fbe82828 (patch) | |
tree | 46fc427d8e83e925202e427d2a631dc9c3bcf480 /configure.ac | |
parent | 5d33705c7befb0711c134089cc8fffdbf9bc031c (diff) | |
download | gdb-e449ea97ebd3c11a8da5df174f1a1333fbe82828.zip gdb-e449ea97ebd3c11a8da5df174f1a1333fbe82828.tar.gz gdb-e449ea97ebd3c11a8da5df174f1a1333fbe82828.tar.bz2 |
[ARM]: Modify assembler to accept floating and signless datatypes for MVE instruction VLDR.
This patch modifies assembler to accept the equivalent sized floating
and signless datatypes for VLDR instruction but as alias for the unsigned version.
gas/ChangeLog:
2019-09-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/tc-arm.c (do_mve_vstr_vldr_RQ): Modify function to allow float
* and signless datatypes for few cases of VLDR instruction.
* testsuite/gas/arm/mve-vldr-bad-3.l: Modify.
* testsuite/gas/arm/mve-vldr-bad-3.s: Likewise.
* testsuite/gas/arm/mve-vstrldr-1.d: Likewise.
* testsuite/gas/arm/mve-vstrldr-1.s: Likewise.
Diffstat (limited to 'configure.ac')
0 files changed, 0 insertions, 0 deletions