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authorDavid Edelsohn <dje.gcc@gmail.com>1994-12-19 20:55:13 +0000
committerDavid Edelsohn <dje.gcc@gmail.com>1994-12-19 20:55:13 +0000
commitedb35c135b95d65fbaf7819485c87a4a6937c2e9 (patch)
treeecbb6184e82f73bfc959d849b720bd99008504e2 /build-all.mk
parent5cda0c7a7f9fed9909912cba94915c478f5dddee (diff)
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* arc-opc.c (insertion fns): Pass pointer to value's table entry.
All uses changed. (extraction fns): Insn argument now array of two words. Return pointer to value's table entry. All uses changed. (arc_opcode_lookup_suffix): Exported for arc-dis.c. (insert_multshift, extract_multshift): New fns. (arc_operands): Add support for cache bypass suffix. Add support for predefined aux regs. Modifier bits moved to flags field. (arc_opcodes): Likewise. Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed. New insn rlc. Update to syntax in programmer's manual. (arc_reg_names): Fix typo in lp_count. Add predefined aux regs. (arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache bypass. (arc_opcode_init_tables): New argument to indicate cpu type. (insert_reg): Handle predefined aux regs. (extract_reg): Likewise. (lookup_register): New fn. * arc-dis.c (arc_condition_codes): Deleted. (print_insn_arc): Handle insns with 32 bit immediate constants better. Clean up modifier handling. Handle predefined aux regs.
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