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author | Tamar Christina <tamar.christina@arm.com> | 2019-03-25 12:12:03 +0000 |
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committer | Tamar Christina <tamar.christina@arm.com> | 2019-03-25 15:05:53 +0000 |
commit | 51457761649bab6868343b3da2258d73a62901f7 (patch) | |
tree | 5eafa5a450c200b8ae23aa19b6745bad7ab8a850 /binutils | |
parent | 53b2f36bf6aa939feab6f82f05d7dad52f82660d (diff) | |
download | gdb-51457761649bab6868343b3da2258d73a62901f7.zip gdb-51457761649bab6868343b3da2258d73a62901f7.tar.gz gdb-51457761649bab6868343b3da2258d73a62901f7.tar.bz2 |
AArch64: Fix AArch64 disassembler mapping symbol search
My previous patch for AArch64 was not enough to catch all the cases where
disassembling an out-of-order section could go wrong. It had missed the case
DATA sections could be incorrectly disassembled as TEXT.
Out of order here refers to an object file where sections are not listed in a
monotonic increasing VMA order.
The ELF ABI for AArch64 [1] specifies the following for mapping symbols:
1) A text section must always have a corresponding mapping symbol at it's
start.
2) Data sections do not require any mapping symbols.
3) The range of a mapping symbol extends from the address it starts on up to
the next mapping symbol (exclusive) or section end (inclusive).
However there is no defined order between a symbol and it's corresponding
mapping symbol in the symbol table. This means that while in general we look
up for a corresponding mapping symbol, we have to make at least one check of
the symbol below the address being disassembled.
When disassembling different PCs within the same section, the search for mapping
symbol can be cached somewhat. We know that the mapping symbol corresponding to
the current PC is either the previous one used, or one at the same address as
the current PC.
However this optimization and mapping symbol search must stop as soon as we
reach the end or start of the section. Furthermore if we're only disassembling
a part of a section, the search is a allowed to search further than the current
chunk, but is not allowed to search past it (The mapping symbol if there, must
be at the same address, so in practice we usually stop at PC+4).
lastly, since only data sections don't require a mapping symbol the default
mapping type should be DATA and not INSN as previously defined, however if the
binary has had all its symbols stripped than this isn't very useful. To fix this
we determine the default based on the section flags. This will allow the
disassembler to be more useful on stripped binaries. If there is no section than
we assume you to be disassembling INSN.
[1] https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4#aaelf64-section4-5-4
binutils/ChangeLog:
* testsuite/binutils-all/aarch64/in-order.d: New test.
* testsuite/binutils-all/aarch64/out-of-order.d: Disassemble data as
well.
opcodes/ChangeLog:
* aarch64-dis.c (print_insn_aarch64): Update the mapping symbol search
order.
Diffstat (limited to 'binutils')
-rw-r--r-- | binutils/ChangeLog | 6 | ||||
-rw-r--r-- | binutils/testsuite/binutils-all/aarch64/in-order.d | 28 | ||||
-rw-r--r-- | binutils/testsuite/binutils-all/aarch64/out-of-order.d | 17 |
3 files changed, 50 insertions, 1 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog index 121c54d..1c6c354 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,5 +1,11 @@ 2019-03-25 Tamar Christina <tamar.christina@arm.com> + * testsuite/binutils-all/aarch64/in-order.d: New test. + * testsuite/binutils-all/aarch64/out-of-order.d: Disassemble data as + well. + +2019-03-25 Tamar Christina <tamar.christina@arm.com> + * objdump.c (disassemble_bytes): Pass stop_offset. * testsuite/binutils-all/aarch64/out-of-order.T: New test. * testsuite/binutils-all/aarch64/out-of-order.d: New test. diff --git a/binutils/testsuite/binutils-all/aarch64/in-order.d b/binutils/testsuite/binutils-all/aarch64/in-order.d new file mode 100644 index 0000000..090337f --- /dev/null +++ b/binutils/testsuite/binutils-all/aarch64/in-order.d @@ -0,0 +1,28 @@ +#PROG: objcopy +#source: out-of-order.s +#ld: -e v1 -Ttext-segment=0x400000 +#objdump: -d +#name: Check if disassembler can handle sections in default order + +.*: +file format .*aarch64.* + +Disassembly of section \.func1: + +0000000000400000 <v1>: + 400000: 8b010000 add x0, x0, x1 + 400004: 00000000 \.word 0x00000000 + +Disassembly of section .func2: + +0000000000400008 <\.func2>: + 400008: 8b010000 add x0, x0, x1 + +Disassembly of section \.func3: + +000000000040000c <\.func3>: + 40000c: 8b010000 add x0, x0, x1 + 400010: 8b010000 add x0, x0, x1 + 400014: 8b010000 add x0, x0, x1 + 400018: 8b010000 add x0, x0, x1 + 40001c: 8b010000 add x0, x0, x1 + 400020: 00000000 \.word 0x00000000 diff --git a/binutils/testsuite/binutils-all/aarch64/out-of-order.d b/binutils/testsuite/binutils-all/aarch64/out-of-order.d index 410f37f..f78adec 100644 --- a/binutils/testsuite/binutils-all/aarch64/out-of-order.d +++ b/binutils/testsuite/binutils-all/aarch64/out-of-order.d @@ -1,10 +1,20 @@ #PROG: objcopy #ld: -T out-of-order.T -#objdump: -d +#objdump: -D #name: Check if disassembler can handle sections in different order than header .*: +file format .*aarch64.* +Disassembly of section \.global: + +00000000ffe00000 <\.global>: + ffe00000: 00000001 \.word 0x00000001 + ffe00004: 00000000 \.word 0x00000000 + ffe00008: 00000001 \.word 0x00000001 + ffe0000c: 00000000 \.word 0x00000000 + ffe00010: 00000001 \.word 0x00000001 + ffe00014: 00000000 \.word 0x00000000 + Disassembly of section \.func2: 0000000004018280 <\.func2>: @@ -25,3 +35,8 @@ Disassembly of section \.func3: 401500c: 8b010000 add x0, x0, x1 4015010: 8b010000 add x0, x0, x1 4015014: 00000000 \.word 0x00000000 + +Disassembly of section \.rodata: + +0000000004015018 <\.rodata>: + 4015018: 00000004 \.word 0x00000004 |