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| author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 19:40:51 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 19:55:21 +0000 |
| commit | 5284e471d53ccb7c7a1d140bd83098607ccf4b8a (patch) | |
| tree | b0c7d481500be41b59a1f8ab540dd25e9e20c599 /binutils | |
| parent | bdd152861ce75c36828904cf3d10f8ce14da6cf5 (diff) | |
| download | gdb-5284e471d53ccb7c7a1d140bd83098607ccf4b8a.zip gdb-5284e471d53ccb7c7a1d140bd83098607ccf4b8a.tar.gz gdb-5284e471d53ccb7c7a1d140bd83098607ccf4b8a.tar.bz2 | |
MIPS16: Add ASMACRO instruction support
Add ASMACRO instruction support as per the MIPS16e ASE architecture
specifications [1][2], completing MIPS16e instruction set support.
[1] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Section 4.1 "MIPS16e Instruction Descriptions", p. 65
[2] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Section 1.1 "MIPS16e Instruction Descriptions", p. 66
include/
* opcode/mips.h: Document `0', `1', `2', `3', `4' and `s'
operand codes.
opcodes/
* mips16-opc.c (decode_mips16_operand): Add `0', `1', `2', `3',
`4' and `s' operand codes.
(mips16_opcodes): Add "asmacro" entry.
binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: Update for
ASMACRO support.
gas/
* testsuite/gas/mips/mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-32@mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-64@mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-asmacro.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
Diffstat (limited to 'binutils')
| -rw-r--r-- | binutils/ChangeLog | 5 | ||||
| -rw-r--r-- | binutils/testsuite/binutils-all/mips/mips16-extend-insn.d | 12 |
2 files changed, 9 insertions, 8 deletions
diff --git a/binutils/ChangeLog b/binutils/ChangeLog index f378262..279e98c 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,5 +1,10 @@ 2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * testsuite/binutils-all/mips/mips16-extend-insn.d: Update for + ASMACRO support. + +2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * testsuite/binutils-all/mips/mips16-extend-insn.d: New test. * testsuite/binutils-all/mips/mips16-extend-insn.s: New test source. diff --git a/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d b/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d index fc170c6..ef4f5a4 100644 --- a/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d +++ b/binutils/testsuite/binutils-all/mips/mips16-extend-insn.d @@ -198,14 +198,10 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> f123 d0c0 sw s0,6432\(sp\) [0-9a-f]+ <[^>]*> f123 d0e0 sw s0,6432\(sp\) [0-9a-f]+ <[^>]*> f123 d800 sw s0,6432\(s0\) -[0-9a-f]+ <[^>]*> f123 extend 0x123 -[0-9a-f]+ <[^>]*> e000 daddu s0,s0 -[0-9a-f]+ <[^>]*> f123 extend 0x123 -[0-9a-f]+ <[^>]*> e001 addu s0,s0 -[0-9a-f]+ <[^>]*> f123 extend 0x123 -[0-9a-f]+ <[^>]*> e002 dsubu s0,s0 -[0-9a-f]+ <[^>]*> f123 extend 0x123 -[0-9a-f]+ <[^>]*> e003 subu s0,s0 +[0-9a-f]+ <[^>]*> f123 e000 asmacro 0x1,0x0,0x0,0x0,0x3,0x1 +[0-9a-f]+ <[^>]*> f123 e001 asmacro 0x1,0x1,0x0,0x0,0x3,0x1 +[0-9a-f]+ <[^>]*> f123 e002 asmacro 0x1,0x2,0x0,0x0,0x3,0x1 +[0-9a-f]+ <[^>]*> f123 e003 asmacro 0x1,0x3,0x0,0x0,0x3,0x1 [0-9a-f]+ <[^>]*> f123 extend 0x123 [0-9a-f]+ <[^>]*> e800 jr s0 [0-9a-f]+ <[^>]*> f123 extend 0x123 |