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authorIan Lance Taylor <ian@airs.com>1992-09-21 22:29:51 +0000
committerIan Lance Taylor <ian@airs.com>1992-09-21 22:29:51 +0000
commite69e7dd6c085497c0429d83506e8b7baad84cc87 (patch)
treef036c6dbead1e50f38b96dfd1293a098b98bdb4b /binutils
parenteee9516d0252e5e8a2090985b02cba858f30b2f7 (diff)
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Patches from WRS:
Mon Sep 21 14:39:56 1992 Ian Lance Taylor (ian@cygnus.com) * m68k-pinsn (print_insn_arg, fetch_arg): added support for operands to memory management instructions, from WRS.
Diffstat (limited to 'binutils')
-rw-r--r--binutils/m68k-pinsn.c35
1 files changed, 34 insertions, 1 deletions
diff --git a/binutils/m68k-pinsn.c b/binutils/m68k-pinsn.c
index 4040ae9..da09b3f 100644
--- a/binutils/m68k-pinsn.c
+++ b/binutils/m68k-pinsn.c
@@ -206,6 +206,30 @@ print_insn_arg (d, buffer, p, addr, stream)
switch (*d)
{
+ case 'c': /* cache identifier */
+ {
+ static char *cacheFieldName[] = { "NOP", "dc", "ic", "bc" };
+ val = fetch_arg (buffer, place, 2);
+ fprintf_filtered (stream, cacheFieldName[val]);
+ break;
+ }
+
+ case 'a': /* address register indirect only. Cf. case '+'. */
+ {
+ fprintf_filtered (stream,
+ "%s@",
+ reg_names [fetch_arg (buffer, place, 3) + 8]);
+ break;
+ }
+
+ case '_': /* 32-bit absolute address for move16. */
+ {
+ val = NEXTLONG (p);
+ fprintf_filtered (stream, "@#");
+ print_address (val, stream);
+ break;
+ }
+
case 'C':
fprintf_filtered (stream, "ccr");
break;
@@ -222,8 +246,11 @@ print_insn_arg (d, buffer, p, addr, stream)
{
static struct { char *name; int value; } names[]
= {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
+ {"tc", 0x003}, {"itt0",0x004}, {"itt1", 0x005},
+ {"dtt0",0x006}, {"dtt1",0x007},
{"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
- {"msp", 0x803}, {"isp", 0x804}};
+ {"msp", 0x803}, {"isp", 0x804}, {"mmusr",0x805},
+ {"urp", 0x806}, {"srp", 0x807}};
val = fetch_arg (buffer, place, 12);
for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
@@ -672,12 +699,18 @@ fetch_arg (buffer, code, bits)
val >>= 10;
break;
+ case 'e':
+ val = (buffer[1] >> 6);
+ break;
+
default:
abort ();
}
switch (bits)
{
+ case 2:
+ return val & 3;
case 3:
return val & 7;
case 4: