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authorJan Beulich <jbeulich@suse.com>2023-02-03 08:20:32 +0100
committerJan Beulich <jbeulich@suse.com>2023-02-03 08:20:32 +0100
commit0655669b86e8651244187561b2d29f49c2a4646b (patch)
tree976b47bb089adcd4da7ab52eb57f3c569fa03ca0 /binutils/testsuite
parent96e034530e092e8b746e00d13086c1138a84504b (diff)
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RISC-V: don't disassemble unrecognized insns as .byte
Insn width granularity being 16 bits, producing byte granular output isn't very useful. With there being a way to specific otherwise unknown insns to the assembler, use that same representation (to be precise: its <length>,<encoding> flavor) for disassembly.
Diffstat (limited to 'binutils/testsuite')
-rw-r--r--binutils/testsuite/binutils-all/riscv/unknown.d6
1 files changed, 3 insertions, 3 deletions
diff --git a/binutils/testsuite/binutils-all/riscv/unknown.d b/binutils/testsuite/binutils-all/riscv/unknown.d
index 6479116..81a4d5a 100644
--- a/binutils/testsuite/binutils-all/riscv/unknown.d
+++ b/binutils/testsuite/binutils-all/riscv/unknown.d
@@ -1,11 +1,11 @@
#as: -march=rv32ic
#objdump: -d
# Test the disassembly of unknown instruction encodings, specifically,
-# ensure that we generate a .?byte opcode.
+# ensure that we generate a .insn directive.
#...
Disassembly of section \.text:
[0-9a-f]+ <\.text>:
- [0-9a-f]+: 0052018b \.4byte 0x52018b
- [0-9a-f]+: 9c45 \.2byte 0x9c45
+ [0-9a-f]+: 0052018b \.insn 4, 0x0052018b
+ [0-9a-f]+: 9c45 \.insn 2, 0x9c45