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authorH.J. Lu <hjl.tools@gmail.com>2009-07-25 14:58:58 +0000
committerH.J. Lu <hjl.tools@gmail.com>2009-07-25 14:58:58 +0000
commit8a9036a406bc608a880e90462ac24b5fbfa4a30f (patch)
tree80afbbc276cdf883094025234c2efd9f9a6993bf /binutils/readelf.c
parentbdc0e08dbcf16b52410ce016ab9ed036a32e7e2d (diff)
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bfd/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_architecture): Add bfd_arch_l1om. (bfd_l1om_arch): New. (bfd_archures_list): Add &bfd_l1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. * configure: Regenerated. * cpu-l1om.c: New. * elf64-x86-64.c (elf64_l1om_elf_object_p): New. (bfd_elf64_l1om_vec): Likewise. (bfd_elf64_l1om_freebsd_vec): Likewise. * Makefile.am (ALL_MACHINES): Add cpu-l1om.lo. (ALL_MACHINES_CFILES): Add cpu-l1om.c. * Makefile.in: Regenerated. * targets.c (bfd_elf64_l1om_vec): New. (bfd_elf64_l1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. binutils/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (guess_is_rela): Handle EM_L1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. gas/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add l1om. (check_cpu_arch_compatible): New. (set_cpu_arch): Use it. (i386_arch): New. (i386_mach): Return bfd_mach_l1om for Intel L1OM. (md_show_usage): Display l1om. (i386_target_format): Return ELF_TARGET_L1OM_FORMAT if cpu_arch_isa_flags.bitfield.cpul1om is set. * config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()). (i386_arch): New. (ELF_TARGET_L1OM_FORMAT): Likewise. * doc/c-i386.texi: Document l1om. gas/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/l1om.d: New. * gas/i386/l1om-inval.l: Likewise. * gas/i386/l1om-inval.s: Likewise. * gas/i386/i386.exp: Run l1om-inval and l1om. include/elf/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_L1OM): New. ld/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64 is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and eelf_l1om_fbsd.o (eelf_l1om.c): New. (eelf_l1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * emulparams/elf_l1om.sh: New. * emulparams/elf_l1om_fbsd.sh: Likewise. ld/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-l1om.d: New. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and protected3-l1om. opcodes/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_l1om_arch. * disassemble.c (disassembler): Likewise. * configure: Regenerated. * i386-dis.c (print_insn): Handle bfd_mach_l1om and bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. Add CPU_L1OM_FLAGS. (cpu_flags): Add CpuL1OM. (set_bitfield): Take an argument to set the value field. (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). (process_i386_opcode_modifier): Updated. (process_i386_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuL1OM): New. (CpuXsave): Updated. (i386_cpu_flags): Add cpul1om.
Diffstat (limited to 'binutils/readelf.c')
-rw-r--r--binutils/readelf.c18
1 files changed, 15 insertions, 3 deletions
diff --git a/binutils/readelf.c b/binutils/readelf.c
index f56e6c2..8097121 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -610,6 +610,7 @@ guess_is_rela (unsigned int e_machine)
case EM_CYGNUS_V850:
case EM_VAX:
case EM_X86_64:
+ case EM_L1OM:
case EM_XSTORMY16:
case EM_XTENSA:
case EM_XTENSA_OLD:
@@ -1128,6 +1129,7 @@ dump_relocations (FILE * file,
break;
case EM_X86_64:
+ case EM_L1OM:
rtype = elf_x86_64_reloc_type (type);
break;
@@ -1292,7 +1294,8 @@ dump_relocations (FILE * file,
else if (elf_header.e_machine == EM_MIPS
&& psym->st_shndx == SHN_MIPS_SUNDEFINED)
sec_name = "SUNDEF";
- else if (elf_header.e_machine == EM_X86_64
+ else if ((elf_header.e_machine == EM_X86_64
+ || elf_header.e_machine == EM_L1OM)
&& psym->st_shndx == SHN_X86_64_LCOMMON)
sec_name = "LARGE_COMMON";
else if (elf_header.e_machine == EM_IA_64
@@ -1837,6 +1840,7 @@ get_machine_name (unsigned e_machine)
case EM_HUANY: return "Harvard Universitys's machine-independent object format";
case EM_PRISM: return "Vitesse Prism";
case EM_X86_64: return "Advanced Micro Devices X86-64";
+ case EM_L1OM: return "Intel L1OM";
case EM_S390_OLD:
case EM_S390: return "IBM S/390";
case EM_SCORE: return "SUNPLUS S+Core";
@@ -2776,6 +2780,7 @@ get_section_type_name (unsigned int sh_type)
result = get_ia64_section_type_name (sh_type);
break;
case EM_X86_64:
+ case EM_L1OM:
result = get_x86_64_section_type_name (sh_type);
break;
case EM_ARM:
@@ -3967,7 +3972,8 @@ get_elf_section_flags (bfd_vma sh_flags)
case SHF_TLS: *p = 'T'; break;
default:
- if (elf_header.e_machine == EM_X86_64
+ if ((elf_header.e_machine == EM_X86_64
+ || elf_header.e_machine == EM_L1OM)
&& flag == SHF_X86_64_LARGE)
*p = 'l';
else if (flag & SHF_MASKOS)
@@ -7035,7 +7041,8 @@ get_symbol_index_type (unsigned int type)
&& elf_header.e_machine == EM_IA_64
&& elf_header.e_ident[EI_OSABI] == ELFOSABI_HPUX)
return "ANSI_COM";
- else if (elf_header.e_machine == EM_X86_64
+ else if ((elf_header.e_machine == EM_X86_64
+ || elf_header.e_machine == EM_L1OM)
&& type == SHN_X86_64_LCOMMON)
return "LARGE_COM";
else if (type == SHN_MIPS_SCOMMON
@@ -7953,6 +7960,7 @@ is_32bit_abs_reloc (unsigned int reloc_type)
case EM_VAX:
return reloc_type == 1; /* R_VAX_32. */
case EM_X86_64:
+ case EM_L1OM:
return reloc_type == 10; /* R_X86_64_32. */
case EM_XSTORMY16:
return reloc_type == 1; /* R_XSTROMY16_32. */
@@ -8002,6 +8010,7 @@ is_32bit_pcrel_reloc (unsigned int reloc_type)
case EM_SPU:
return reloc_type == 13; /* R_SPU_REL32. */
case EM_X86_64:
+ case EM_L1OM:
return reloc_type == 2; /* R_X86_64_PC32. */
case EM_XTENSA_OLD:
case EM_XTENSA:
@@ -8037,6 +8046,7 @@ is_64bit_abs_reloc (unsigned int reloc_type)
case EM_SPARC:
return reloc_type == 54; /* R_SPARC_UA64. */
case EM_X86_64:
+ case EM_L1OM:
return reloc_type == 1; /* R_X86_64_64. */
case EM_S390_OLD:
case EM_S390:
@@ -8069,6 +8079,7 @@ is_64bit_pcrel_reloc (unsigned int reloc_type)
case EM_SPARC:
return reloc_type == 46; /* R_SPARC_DISP64 */
case EM_X86_64:
+ case EM_L1OM:
return reloc_type == 24; /* R_X86_64_PC64 */
case EM_S390_OLD:
case EM_S390:
@@ -8138,6 +8149,7 @@ is_none_reloc (unsigned int reloc_type)
case EM_S390: /* R_390_NONE. */
case EM_CRIS: /* R_CRIS_NONE. */
case EM_X86_64: /* R_X86_64_NONE. */
+ case EM_L1OM: /* R_X86_64_NONE. */
case EM_MN10300: /* R_MN10300_NONE. */
case EM_M32R: /* R_M32R_NONE. */
return reloc_type == 0;