[ARC] Allow CPU to be enforced via disassemble_info options

Currently print_insn_arc relies on BFD mach and ELF private headers to
distinguish between various ARC architectures.  Sometimes those values are not
correct or available, mainly in the case of debugging targets without and ELF
file available.  Changing a BFD mach is not a problem for the debugger, because
this is a generic BFD field, and GDB, for example, already sets it according to
information provided in XML target description or specified via GDB 'set arch'
command.  However, things are more complicated for ELF private headers, since
it requires existing of an actual ELF file.  To workaround this problem this
patch allows CPU model to be specified via disassemble info options.  If CPU is
specified in options, then it will take a higher precedence than whatever might
be specified in ELF file.

This is mostly needed for ARC EM and ARC HS, because they have the same
"architecture" (mach) ARCv2 and differ in their private ELF headers.  Other ARC
architectures can be distinguished between each other purely via "mach" field.

Proposed disassemble option format is "cpu=<CPU>", where CPU can be any valid
ARC CPU name as supported by GAS.  Note that this creates a seeming redundancy
with objdump -m/--architecture option, however -mEM and -mHS still result in
"ARCv2" architecture internally, while -Mcpu={HS,EM} would have an actual
effect on disassembler.

opcodes/ChangeLog:

yyyy-mm-dd  Anton Kolesov  <anton.kolesov@synopsys.com>

	* arc-dis.c (enforced_isa_mask): Declare.
	(cpu_types): Likewise.
	(parse_cpu_option): New function.
	(parse_disassembler_options): Use it.
	(print_insn_arc): Use enforced_isa_mask.
	(print_arc_disassembler_options): Document new options.

binutils/ChangeLog:

yyyy-mm-dd  Anton Kolesov  <anton.kolesov@synopsys.com>

	* doc/binutils.texi: Document new cpu=... disassembler options for ARC.

1 files changed, 8 insertions, 0 deletions

diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
index 23d8685..a2a670a 100644
--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -2314,6 +2314,14 @@ of double precision assist instructions, @option{fpus} selects the
 printing of FPU single precision FP instructions, while @option{fpud}
 selects the printing of FPU souble precision FP instructions.
 
+@option{cpu=...} allows to enforce a particular ISA when disassembling
+instructions, overriding the @option{-m} value or whatever is in the ELF file.
+This might be useful to select ARC EM or HS ISA, because architecture is same
+for those and disassembler relies on private ELF header data to decide if code
+is for EM or HS.  This option might be specified multiple times - only the
+latest value will be used.  Valid values are same as for the assembler
+@option{-mcpu=...} option.
+
 If the target is an ARM architecture then this switch can be used to
 select which register name set is used during disassembler.  Specifying
 @option{-M reg-names-std} (the default) will select the register names as