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| author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:55:25 +0800 |
|---|---|---|
| committer | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:55:25 +0800 |
| commit | 9108bc33b1ca0b2e930c0cce5b1a0394e33e86be (patch) | |
| tree | adb7aaf17163d449da228c09b5f7c94b80e3163d /binutils/NEWS | |
| parent | bd782c07b914f28fd927cec42eacd8adcf556dca (diff) | |
| download | gdb-9108bc33b1ca0b2e930c0cce5b1a0394e33e86be.zip gdb-9108bc33b1ca0b2e930c0cce5b1a0394e33e86be.tar.gz gdb-9108bc33b1ca0b2e930c0cce5b1a0394e33e86be.tar.bz2 | |
[MIPS] Add Loongson 2K1000 proccessor support.
bfd/
* archures.c (bfd_architecture): New machine
bfd_mach_mips_gs264e.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (enum I_xxx): Likewise.
(arch_info_struct): Likewise.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle
E_MIPS_MACH_GS264E.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Map bfd_mach_mips_gs264e to
bfd_mach_mips_gs464e extension.
binutils/
* NEWS: Mention Loongson 2K1000 proccessor support.
* readelf.c (get_machine_flags): Handle gs264e.
elfcpp/
* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS264E.
gas/
* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS264E.
(mips_cpu_info_table): Add gs264e descriptors.
* doc/as.texi (march table): Add gs264e.
include/
* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
* opcode/mips.h (CPU_XXX): New CPU_GS264E.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
gs264e and gs464e.
opcodes/
* mips-dis.c (mips_arch_choices): Add gs264e descriptors.
Diffstat (limited to 'binutils/NEWS')
| -rw-r--r-- | binutils/NEWS | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/binutils/NEWS b/binutils/NEWS index 775436d..de70c3a 100644 --- a/binutils/NEWS +++ b/binutils/NEWS @@ -1,5 +1,10 @@ -*- text -*- +* The MIPS port now supports the Loongson 2K1000 processor which implements + the MIPS64r2 ISA, the Loongson-mmi ASE, Loongson-cam ASE, Loongson-ext ASE, + Loongson-ext2 ASE and MSA ASE instructions. Add -march=gs264e option for + Loongson 2K1000 processor. + * The MIPS port now supports the Loongson 3A2000/3A3000 processor which implements the MIPS64r2 ISA, the Loongson-mmi ASE, Loongson-cam ASE, Loongson-ext ASE and Loongson-ext2 ASE instructions. Add -march=gs464e |