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authorMaciej W. Rozycki <macro@imgtec.com>2017-06-28 02:07:36 +0100
committerMaciej W. Rozycki <macro@imgtec.com>2017-06-28 02:07:36 +0100
commit38bf472a15210c222bb3885820e763c47760a704 (patch)
tree71d1b3d93f6a6f8d85fb4b1ff4a099fcf468b6a3 /bfd
parent9991e9d77fe04c4fde9b88964c6f25119a781e0d (diff)
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MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with the MIPS16e2 ASE as per documentation, including in particular: 1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW MIPS16e2 instructions[1], for assembly and disassembly, 2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE regular MIPS instructions[2], for assembly and disassembly, 3. ELF binary file annotation for the interAptiv MR2 MIPS architecture extension. 4. Support for interAptiv MR2 architecture selection for assembly, in the form of the `-march=interaptiv-mr2' command-line option and its corresponding `arch=interaptiv-mr2' setting for the `.set' and `.module' pseudo-ops. 5. Support for interAptiv MR2 architecture selection for disassembly, in the form of the `mips:interaptiv-mr2' target architecture, for use e.g. with the `-m' command-line option for `objdump'. Parts of this change by Matthew Fortune and Andrew Bennett. References: [1] "MIPS32 interAptiv Multiprocessing System Software User's Manual", Imagination Technologies Ltd., Document Number: MD00904, Revision 02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific Instructions", pp. 878-883 [2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917 include/ * elf/mips.h (E_MIPS_MACH_IAMR2): New macro. (AFL_EXT_INTERAPTIV_MR2): Likewise. * opcode/mips.h: Document new operand codes defined. (INSN_INTERAPTIV_MR2): New macro. (INSN_CHIP_MASK): Adjust accordingly. (CPU_INTERAPTIV_MR2): New macro. (cpu_is_member) <CPU_INTERAPTIV_MR2>: New case. (MIPS16_ALL_ARGS): Rename to... (MIPS_SVRS_ALL_ARGS): ... this. (MIPS16_ALL_STATICS): Rename to... (MIPS_SVRS_ALL_STATICS): ... this. bfd/ * archures.c (bfd_mach_mips_interaptiv_mr2): New macro. * cpu-mips.c (I_interaptiv_mr2): New enum value. (arch_info_struct): Add "mips:interaptiv-mr2" entry. * elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New case. (mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise. (bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise. (print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise. (mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and `bfd_mach_mips_interaptiv_mr2' entries. * bfd-in2.h: Regenerate. opcodes/ * mips-formats.h (INT_BIAS): New macro. (INT_ADJ): Redefine in INT_BIAS terms. * mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry. (mips_print_save_restore): New function. (print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment. (validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort' call. (print_insn_args): Handle OP_SAVE_RESTORE_LIST. (print_mips16_insn_arg): Call `mips_print_save_restore' for OP_SAVE_RESTORE_LIST handling, factored out from here. * mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case. (RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros. (mips_builtin_opcodes): Add "restore" and "save" entries. * mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases. (IAMR2): New macro. (mips16_opcodes): Add "copyw" and "ucopyw" entries. binutils/ * readelf.c (get_machine_flags) <E_MIPS_MACH_IAMR2>: New case. (print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise. * NEWS: Mention Imagination interAptiv MR2 processor support. gas/ * config/tc-mips.c (validate_mips_insn): Handle OP_SAVE_RESTORE_LIST specially. (mips_encode_save_restore, mips16_encode_save_restore): New functions. (match_save_restore_list_operand): Factor out SAVE/RESTORE operand insertion into the instruction word or halfword to these new functions. (mips_cpu_info_table): Add "interaptiv-mr2" entry. * doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the `-march=' argument list.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog15
-rw-r--r--bfd/archures.c1
-rw-r--r--bfd/bfd-in2.h1
-rw-r--r--bfd/cpu-mips.c3
-rw-r--r--bfd/elfxx-mips.c18
5 files changed, 38 insertions, 0 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 31fd542..3f81ea4 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,18 @@
+2017-06-28 Maciej W. Rozycki <macro@imgtec.com>
+ Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * archures.c (bfd_mach_mips_interaptiv_mr2): New macro.
+ * cpu-mips.c (I_interaptiv_mr2): New enum value.
+ (arch_info_struct): Add "mips:interaptiv-mr2" entry.
+ * elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New
+ case.
+ (mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise.
+ (bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise.
+ (print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
+ (mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and
+ `bfd_mach_mips_interaptiv_mr2' entries.
+ * bfd-in2.h: Regenerate.
+
2017-06-27 Nick Clifton <nickc@redhat.com>
* tekhex.c (pass_over): Revert accidental conversion of a local
diff --git a/bfd/archures.c b/bfd/archures.c
index 2fefec5..433b95f 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -200,6 +200,7 @@ DESCRIPTION
.#define bfd_mach_mips_octeon2 6502
.#define bfd_mach_mips_octeon3 6503
.#define bfd_mach_mips_xlr 887682 {* decimal 'XLR' *}
+.#define bfd_mach_mips_interaptiv_mr2 736550 {* decimal 'IA2' *}
.#define bfd_mach_mipsisa32 32
.#define bfd_mach_mipsisa32r2 33
.#define bfd_mach_mipsisa32r3 34
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 8c312e3..971acb8 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2059,6 +2059,7 @@ enum bfd_architecture
#define bfd_mach_mips_octeon2 6502
#define bfd_mach_mips_octeon3 6503
#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
+#define bfd_mach_mips_interaptiv_mr2 736550 /* decimal 'IA2' */
#define bfd_mach_mipsisa32 32
#define bfd_mach_mipsisa32r2 33
#define bfd_mach_mipsisa32r3 34
diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c
index 70a8aa7..2493094 100644
--- a/bfd/cpu-mips.c
+++ b/bfd/cpu-mips.c
@@ -104,6 +104,7 @@ enum
I_mipsocteon2,
I_mipsocteon3,
I_xlr,
+ I_interaptiv_mr2,
I_micromips
};
@@ -155,6 +156,8 @@ static const bfd_arch_info_type arch_info_struct[] =
N (64, 64, bfd_mach_mips_octeon2,"mips:octeon2", FALSE, NN(I_mipsocteon2)),
N (64, 64, bfd_mach_mips_octeon3, "mips:octeon3", FALSE, NN(I_mipsocteon3)),
N (64, 64, bfd_mach_mips_xlr, "mips:xlr", FALSE, NN(I_xlr)),
+ N (32, 32, bfd_mach_mips_interaptiv_mr2, "mips:interaptiv-mr2", FALSE,
+ NN(I_interaptiv_mr2)),
N (64, 64, bfd_mach_mips_micromips,"mips:micromips",FALSE,0)
};
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index e326edd..2eb3dd3 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -6793,6 +6793,9 @@ _bfd_elf_mips_mach (flagword flags)
case E_MIPS_MACH_XLR:
return bfd_mach_mips_xlr;
+ case E_MIPS_MACH_IAMR2:
+ return bfd_mach_mips_interaptiv_mr2;
+
default:
switch (flags & EF_MIPS_ARCH)
{
@@ -11967,6 +11970,10 @@ mips_set_isa_flags (bfd *abfd)
val = E_MIPS_ARCH_32R2;
break;
+ case bfd_mach_mips_interaptiv_mr2:
+ val = E_MIPS_ARCH_32R2 | E_MIPS_MACH_IAMR2;
+ break;
+
case bfd_mach_mipsisa64r2:
case bfd_mach_mipsisa64r3:
case bfd_mach_mipsisa64r5:
@@ -14026,6 +14033,12 @@ static const struct mips_mach_extension mips_mach_extensions[] =
{ bfd_mach_mips4100, bfd_mach_mips4000 },
{ bfd_mach_mips5900, bfd_mach_mips4000 },
+ /* MIPS32r3 extensions. */
+ { bfd_mach_mips_interaptiv_mr2, bfd_mach_mipsisa32r3 },
+
+ /* MIPS32r2 extensions. */
+ { bfd_mach_mipsisa32r3, bfd_mach_mipsisa32r2 },
+
/* MIPS32 extensions. */
{ bfd_mach_mipsisa32r2, bfd_mach_mipsisa32 },
@@ -14123,6 +14136,8 @@ bfd_mips_isa_ext (bfd *abfd)
case bfd_mach_mips_octeon3: return AFL_EXT_OCTEON3;
case bfd_mach_mips_octeon2: return AFL_EXT_OCTEON2;
case bfd_mach_mips_xlr: return AFL_EXT_XLR;
+ case bfd_mach_mips_interaptiv_mr2:
+ return AFL_EXT_INTERAPTIV_MR2;
default: return 0;
}
}
@@ -15719,6 +15734,9 @@ print_mips_isa_ext (FILE *file, unsigned int isa_ext)
case AFL_EXT_LOONGSON_2F:
fputs ("ST Microelectronics Loongson 2F", file);
break;
+ case AFL_EXT_INTERAPTIV_MR2:
+ fputs ("Imagination interAptiv MR2", file);
+ break;
default:
fprintf (file, "%s (%d)", _("Unknown"), isa_ext);
break;