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authorAndrew Waterman <andrew@sifive.com>2017-09-23 18:04:16 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2017-10-24 08:02:46 -0700
commit3342be5dabeeaf2218dfbf4d38f92214612436f4 (patch)
treee39053086e5e3873823abd2d77e630fc32926fe7 /bfd
parent3779bbe01b4ec1e5ae0a5c555f838999ba88ac50 (diff)
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RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2
This matches the ISA specification. This also adds two tests: one to make sure the assembler rejects invalid 'c.lui's, and one to make sure we only relax valid 'c.lui's. bfd/ChangeLog 2017-10-24 Andrew Waterman <andrew@sifive.com> * elfnn-riscv.c (_bfd_riscv_relax_lui): Don't relax to c.lui when rd is x0. include/ChangeLog 2017-10-24 Andrew Waterman <andrew@sifive.com> * opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the immediate 0. gas/ChangeLog 2017-10-24 Andrew Waterman <andrew@sifive.com> * testsuite/gas/riscv/c-lui-fail.d: New testcase. gas/testsuite/gas/riscv/c-lui-fail.l: Likewise. gas/testsuite/gas/riscv/c-lui-fail.s: Likewise. gas/testsuite/gas/riscv/riscv.exp: Likewise. ld/ChangeLog 2017-10-24 Andrew Waterman <andrew@sifive.com> * ld/testsuite/ld-riscv-elf/c-lui.d: New testcase. ld/testsuite/ld-riscv-elf/c-lui.s: Likewise. ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: New test suite.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog5
-rw-r--r--bfd/elfnn-riscv.c5
2 files changed, 8 insertions, 2 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index a534b21..6f2f5e3 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,8 @@
+2017-10-24 Andrew Waterman <andrew@sifive.com>
+
+ * elfnn-riscv.c (_bfd_riscv_relax_lui): Don't relax to c.lui
+ when rd is x0.
+
2017-10-24 Renlin Li <renlin.li@arm.com>
PR ld/21703
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index f7cdb4e..b6e3892 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -2988,9 +2988,10 @@ _bfd_riscv_relax_lui (bfd *abfd,
&& VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval))
&& VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval + ELF_MAXPAGESIZE)))
{
- /* Replace LUI with C.LUI if legal (i.e., rd != x2/sp). */
+ /* Replace LUI with C.LUI if legal (i.e., rd != x0 and rd != x2/sp). */
bfd_vma lui = bfd_get_32 (abfd, contents + rel->r_offset);
- if (((lui >> OP_SH_RD) & OP_MASK_RD) == X_SP)
+ unsigned rd = ((unsigned)lui >> OP_SH_RD) & OP_MASK_RD;
+ if (rd == 0 || rd == X_SP)
return TRUE;
lui = (lui & (OP_MASK_RD << OP_SH_RD)) | MATCH_C_LUI;