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authorH.J. Lu <hjl.tools@gmail.com>2015-12-04 08:43:45 -0800
committerH.J. Lu <hjl.tools@gmail.com>2015-12-04 09:03:04 -0800
commit02e2aef89bb58e8e0cc4390db41c5f775e1b7c3e (patch)
tree323891844d56806214ca3851131d40cea1d8fc68 /bfd
parentf27c5390b2fcff06b1e2199a4f051d543670aa03 (diff)
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Optimize R_386_GOT32/R_386_GOT32X only if addend is 0
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend isn't 0. It isn't valid to convert movl foo@GOT+1(%ecx), %eax to leal foo@GOTOFF+1(%ecx), %eax nor to convert movq foo@GOTPCREL+1(%rip), %rax to leaq foo(%rip), %rax for x86-64. We should check if addend is 0 before optimizing R_386_GOT32 and R_386_GOT32X relocations. Testcases are added for i386 and x86-64. bfd/ * elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0. (elf_i386_relocate_section): Skip R_386_GOT32X optimization if addend isn't 0. ld/testsuite/ * ld-i386/i386.exp: Run mov2a, mov2b and mov3. * ld-i386/mov2.s: New file. * ld-i386/mov2a.d: Likewise. * ld-i386/mov2b.d: Likewise. * ld-i386/mov3.d: Likewise. * ld-i386/mov3.s: Likewise. * ld-x86-64/mov2.s: Likewise. * ld-x86-64/mov2a.d: Likewise. * ld-x86-64/mov2b.d: Likewise. * ld-x86-64/mov2c.d: Likewise. * ld-x86-64/mov2d.d: Likewise. * ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog6
-rw-r--r--bfd/elf32-i386.c24
2 files changed, 17 insertions, 13 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index ab717ea..e810dbe 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2015-12-04 H.J. Lu <hongjiu.lu@intel.com>
+
+ * elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
+ (elf_i386_relocate_section): Skip R_386_GOT32X optimization if
+ addend isn't 0.
+
2015-12-04 Tristan Gingold <gingold@adacore.com>
* elf.c (rewrite_elf_program_header): Remove useless loop.
diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c
index ae3187d..300839b 100644
--- a/bfd/elf32-i386.c
+++ b/bfd/elf32-i386.c
@@ -2820,6 +2820,11 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
if (roff < 2)
continue;
+ /* Addend for R_386_GOT32 and R_386_GOT32X relocations must be 0. */
+ addend = bfd_get_32 (abfd, contents + roff);
+ if (addend != 0)
+ continue;
+
modrm = bfd_get_8 (abfd, contents + roff - 1);
baseless = (modrm & 0xc7) == 0x5;
@@ -2913,11 +2918,6 @@ elf_i386_convert_load (bfd *abfd, asection *sec,
{
/* The function is locally defined. */
convert_branch:
- addend = bfd_get_32 (abfd, contents + roff);
- /* Addend for R_386_GOT32X relocation must be 0. */
- if (addend != 0)
- continue;
-
/* Convert R_386_GOT32X to R_386_PC32. */
if (modrm == 0x15 || (modrm & 0xf8) == 0x90)
{
@@ -3007,11 +3007,6 @@ convert_load:
}
else
{
- /* Addend for R_386_GOT32X relocation must be 0. */
- addend = bfd_get_32 (abfd, contents + roff);
- if (addend != 0)
- continue;
-
if (opcode == 0x85)
{
/* Convert "test %reg1, foo@GOT(%reg2)" to
@@ -3998,8 +3993,11 @@ elf_i386_relocate_section (bfd *output_bfd,
branch to direct branch. It is OK to convert adc,
add, and, cmp, or, sbb, sub, test, xor only when PIC
is false. */
- unsigned int opcode;
- opcode = bfd_get_8 (abfd, contents + rel->r_offset - 2);
+ unsigned int opcode, addend;
+ addend = bfd_get_32 (input_bfd, contents + rel->r_offset);
+ if (addend != 0)
+ goto r_386_got32;
+ opcode = bfd_get_8 (input_bfd, contents + rel->r_offset - 2);
if (opcode != 0x8b && opcode != 0xff)
goto r_386_got32;
}
@@ -4031,7 +4029,7 @@ elf_i386_relocate_section (bfd *output_bfd,
/* If not PIC, add the .got.plt section address for
baseless addressing. */
unsigned int modrm;
- modrm = bfd_get_8 (abfd, contents + rel->r_offset - 1);
+ modrm = bfd_get_8 (input_bfd, contents + rel->r_offset - 1);
if ((modrm & 0xc7) == 0x5)
relocation += offplt;
}